registers.hh (13610:5d5404ac6288) registers.hh (13622:ba31c2a23eca)
1/*
2 * Copyright (c) 2010-2011, 2014, 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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72
73// Dummy typedefs
74using VecPredReg = ::DummyVecPredReg;
75using ConstVecPredReg = ::DummyConstVecPredReg;
76using VecPredRegContainer = ::DummyVecPredRegContainer;
77constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
78constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
79
1/*
2 * Copyright (c) 2010-2011, 2014, 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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72
73// Dummy typedefs
74using VecPredReg = ::DummyVecPredReg;
75using ConstVecPredReg = ::DummyConstVecPredReg;
76using VecPredRegContainer = ::DummyVecPredRegContainer;
77constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
78constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
79
80// condition code register; must be at least 32 bits for FpCondCodes
81typedef uint64_t CCReg;
82
83// Constants Related to the number of registers
84const int NumIntArchRegs = NUM_ARCH_INTREGS;
85// The number of single precision floating point registers
86const int NumFloatV7ArchRegs = 64;
87const int NumFloatV8ArchRegs = 128;
88const int NumFloatSpecialRegs = 32;
89const int NumVecV7ArchRegs = 64;
90const int NumVecV8ArchRegs = 32;

--- 38 unchanged lines hidden --- 		80// Constants Related to the number of registers
81const int NumIntArchRegs = NUM_ARCH_INTREGS;
82// The number of single precision floating point registers
83const int NumFloatV7ArchRegs = 64;
84const int NumFloatV8ArchRegs = 128;
85const int NumFloatSpecialRegs = 32;
86const int NumVecV7ArchRegs = 64;
87const int NumVecV8ArchRegs = 32;

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