2 * Copyright (c) 2007-2008 The Florida State University 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Stephen Hines 29 */ 30 31#ifndef __ARCH_ARM_REGISTERS_HH__ 32#define __ARCH_ARM_REGISTERS_HH__ 33 34#include "arch/arm/max_inst_regs.hh" 35#include "arch/arm/intregs.hh" 36#include "arch/arm/miscregs.hh" 37 38namespace ArmISA { 39 40using ArmISAInst::MaxInstSrcRegs; 41using ArmISAInst::MaxInstDestRegs; 42 43typedef uint16_t RegIndex; 44 45typedef uint64_t IntReg; 46 47// floating point register file entry type 48typedef uint32_t FloatRegBits; 49typedef float FloatReg; 50 51// cop-0/cop-1 system control register 52typedef uint64_t MiscReg; 53 54// Constants Related to the number of registers 55const int NumIntArchRegs = NUM_ARCH_INTREGS; 56// The number of single precision floating point registers 57const int NumFloatArchRegs = 64; 58const int NumFloatSpecialRegs = 8; 59 60const int NumIntRegs = NUM_INTREGS; 61const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
| 14 * Copyright (c) 2007-2008 The Florida State University 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 */ 42 43#ifndef __ARCH_ARM_REGISTERS_HH__ 44#define __ARCH_ARM_REGISTERS_HH__ 45 46#include "arch/arm/max_inst_regs.hh" 47#include "arch/arm/intregs.hh" 48#include "arch/arm/miscregs.hh" 49 50namespace ArmISA { 51 52using ArmISAInst::MaxInstSrcRegs; 53using ArmISAInst::MaxInstDestRegs; 54 55typedef uint16_t RegIndex; 56 57typedef uint64_t IntReg; 58 59// floating point register file entry type 60typedef uint32_t FloatRegBits; 61typedef float FloatReg; 62 63// cop-0/cop-1 system control register 64typedef uint64_t MiscReg; 65 66// Constants Related to the number of registers 67const int NumIntArchRegs = NUM_ARCH_INTREGS; 68// The number of single precision floating point registers 69const int NumFloatArchRegs = 64; 70const int NumFloatSpecialRegs = 8; 71 72const int NumIntRegs = NUM_INTREGS; 73const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
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65 66// semantically meaningful register indices 67const int ReturnValueReg = 0; 68const int ReturnValueReg1 = 1; 69const int ReturnValueReg2 = 2; 70const int ArgumentReg0 = 0; 71const int ArgumentReg1 = 1; 72const int ArgumentReg2 = 2; 73const int ArgumentReg3 = 3; 74const int FramePointerReg = 11; 75const int StackPointerReg = INTREG_SP; 76const int ReturnAddressReg = INTREG_LR; 77const int PCReg = INTREG_PC; 78 79const int ZeroReg = INTREG_ZERO; 80 81const int SyscallNumReg = ReturnValueReg; 82const int SyscallPseudoReturnReg = ReturnValueReg; 83const int SyscallSuccessReg = ReturnValueReg; 84 85// These help enumerate all the registers for dependence tracking. 86const int FP_Base_DepTag = NumIntRegs * (MODE_MAXMODE + 1); 87const int Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs;
| 77 78// semantically meaningful register indices 79const int ReturnValueReg = 0; 80const int ReturnValueReg1 = 1; 81const int ReturnValueReg2 = 2; 82const int ArgumentReg0 = 0; 83const int ArgumentReg1 = 1; 84const int ArgumentReg2 = 2; 85const int ArgumentReg3 = 3; 86const int FramePointerReg = 11; 87const int StackPointerReg = INTREG_SP; 88const int ReturnAddressReg = INTREG_LR; 89const int PCReg = INTREG_PC; 90 91const int ZeroReg = INTREG_ZERO; 92 93const int SyscallNumReg = ReturnValueReg; 94const int SyscallPseudoReturnReg = ReturnValueReg; 95const int SyscallSuccessReg = ReturnValueReg; 96 97// These help enumerate all the registers for dependence tracking. 98const int FP_Base_DepTag = NumIntRegs * (MODE_MAXMODE + 1); 99const int Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs;
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