1/*
2 * Copyright (c) 2007-2008 The Florida State University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright

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54// Constants Related to the number of registers
55const int NumIntArchRegs = NUM_ARCH_INTREGS;
56// The number of single precision floating point registers
57const int NumFloatArchRegs = 64;
58const int NumFloatSpecialRegs = 8;
59
60const int NumIntRegs = NUM_INTREGS;
61const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
62
63const int NumMiscRegs = NUM_MISCREGS;
64
65
66// semantically meaningful register indices
67const int ReturnValueReg = 0;
68const int ReturnValueReg1 = 1;
69const int ReturnValueReg2 = 2;
70const int ArgumentReg0 = 0;
71const int ArgumentReg1 = 1;
72const int ArgumentReg2 = 2;

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80
81const int SyscallNumReg = ReturnValueReg;
82const int SyscallPseudoReturnReg = ReturnValueReg;
83const int SyscallSuccessReg = ReturnValueReg;
84
85// These help enumerate all the registers for dependence tracking.
86const int FP_Base_DepTag = NumIntRegs * (MODE_MAXMODE + 1);
87const int Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs;
88
89typedef union {
90 IntReg intreg;
91 FloatReg fpreg;
92 MiscReg ctrlreg;
93} AnyReg;
94
95} // namespace ArmISA
96
97#endif