1/*
2 * Copyright (c) 2010-2011, 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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53
54// For a predicated instruction, we need all the
55// destination registers to also be sources
56const int MaxInstSrcRegs = ArmISAInst::MaxInstDestRegs +
57 ArmISAInst::MaxInstSrcRegs;
58using ArmISAInst::MaxInstDestRegs;
59using ArmISAInst::MaxMiscDestRegs;
60
61typedef uint64_t IntReg;
62
63// floating point register file entry type
64typedef uint32_t FloatRegBits;
65typedef float FloatReg;
66
67// cop-0/cop-1 system control register
68typedef uint64_t MiscReg;

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102const int PCReg = INTREG_PC;
103
104const int ZeroReg = INTREG_ZERO;
105
106const int SyscallNumReg = ReturnValueReg;
107const int SyscallPseudoReturnReg = ReturnValueReg;
108const int SyscallSuccessReg = ReturnValueReg;
109
110typedef union {
111 IntReg intreg;
112 FloatReg fpreg;
113 CCReg ccreg;
114 MiscReg ctrlreg;
115} AnyReg;
116
117} // namespace ArmISA
118
119#endif