process.cc (7414:0a05aa495903) process.cc (7441:be2acdfb8bdc)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 348 unchanged lines hidden (view full) ---

357
358 //Align the "stack_min" to a page boundary.
359 stack_min = roundDown(stack_min, pageSize);
360}
361
362ArmISA::IntReg
363ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
364{
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 348 unchanged lines hidden (view full) ---

357
358 //Align the "stack_min" to a page boundary.
359 stack_min = roundDown(stack_min, pageSize);
360}
361
362ArmISA::IntReg
363ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
364{
365 assert(i < 4);
365 assert(i < 6);
366 return tc->readIntReg(ArgumentReg0 + i++);
367}
368
366 return tc->readIntReg(ArgumentReg0 + i++);
367}
368
369uint64_t
370ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width)
371{
372 assert(width == 32 || width == 64);
373 if (width == 32)
374 return getSyscallArg(tc, i);
375
376 // 64 bit arguments are passed starting in an even register
377 if (i % 2 != 0)
378 i++;
379
380 // Registers r0-r6 can be used
381 assert(i < 5);
382 uint64_t val;
383 val = tc->readIntReg(ArgumentReg0 + i++);
384 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32);
385 return val;
386}
387
388
369void
370ArmLiveProcess::setSyscallArg(ThreadContext *tc,
371 int i, ArmISA::IntReg val)
372{
373 assert(i < 4);
374 tc->setIntReg(ArgumentReg0 + i, val);
375}
376
377void
378ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
379 SyscallReturn return_value)
380{
381 tc->setIntReg(ReturnValueReg, return_value.value());
382}
389void
390ArmLiveProcess::setSyscallArg(ThreadContext *tc,
391 int i, ArmISA::IntReg val)
392{
393 assert(i < 4);
394 tc->setIntReg(ArgumentReg0 + i, val);
395}
396
397void
398ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
399 SyscallReturn return_value)
400{
401 tc->setIntReg(ReturnValueReg, return_value.value());
402}