process.cc (6400:b7fd31c84c99) process.cc (6701:4842482e1bd1)
1/*
2 * Copyright (c) 2007-2008 The Florida State University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 310 unchanged lines hidden (view full) ---

319 tc->setPC(prog_entry);
320 tc->setNextPC(prog_entry + sizeof(MachInst));
321
322 //Align the "stack_min" to a page boundary.
323 stack_min = roundDown(stack_min, pageSize);
324}
325
326ArmISA::IntReg
1/*
2 * Copyright (c) 2007-2008 The Florida State University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 310 unchanged lines hidden (view full) ---

319 tc->setPC(prog_entry);
320 tc->setNextPC(prog_entry + sizeof(MachInst));
321
322 //Align the "stack_min" to a page boundary.
323 stack_min = roundDown(stack_min, pageSize);
324}
325
326ArmISA::IntReg
327ArmLiveProcess::getSyscallArg(ThreadContext *tc, int i)
327ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
328{
329 assert(i < 4);
328{
329 assert(i < 4);
330 return tc->readIntReg(ArgumentReg0 + i);
330 return tc->readIntReg(ArgumentReg0 + i++);
331}
332
333void
334ArmLiveProcess::setSyscallArg(ThreadContext *tc,
335 int i, ArmISA::IntReg val)
336{
337 assert(i < 4);
338 tc->setIntReg(ArgumentReg0 + i, val);
339}
340
341void
342ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
343 SyscallReturn return_value)
344{
345 tc->setIntReg(ReturnValueReg, return_value.value());
346}
331}
332
333void
334ArmLiveProcess::setSyscallArg(ThreadContext *tc,
335 int i, ArmISA::IntReg val)
336{
337 assert(i < 4);
338 tc->setIntReg(ArgumentReg0 + i, val);
339}
340
341void
342ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
343 SyscallReturn return_value)
344{
345 tc->setIntReg(ReturnValueReg, return_value.value());
346}