process.cc (6019:76890d8b28f5) process.cc (6020:0647c8b31a99)
1/*
2 * Copyright (c) 2007-2008 The Florida State University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 29 unchanged lines hidden (view full) ---

38#include "mem/page_table.hh"
39#include "mem/translating_port.hh"
40#include "sim/process_impl.hh"
41#include "sim/system.hh"
42
43using namespace std;
44using namespace ArmISA;
45
1/*
2 * Copyright (c) 2007-2008 The Florida State University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 29 unchanged lines hidden (view full) ---

38#include "mem/page_table.hh"
39#include "mem/translating_port.hh"
40#include "sim/process_impl.hh"
41#include "sim/system.hh"
42
43using namespace std;
44using namespace ArmISA;
45
46ArmLiveProcess::ArmLiveProcess(LiveProcessParams * params,
47 ObjectFile *objFile)
46ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile)
48 : LiveProcess(params, objFile)
49{
50 stack_base = 0xc0000000L;
51
52 // Set pointer for next thread stack. Reserve 8M for main stack.
53 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
54
55 // Set up break point (Top of Heap)

--- 86 unchanged lines hidden (view full) ---

142
143 /*
144 //uint8_t insns[] = {0xe5, 0x9f, 0x00, 0x08, 0xe1, 0xa0, 0xf0, 0x0e};
145 uint8_t insns[] = {0x08, 0x00, 0x9f, 0xe5, 0x0e, 0xf0, 0xa0, 0xe1};
146
147 initVirtMem->writeBlob(0xffff0fe0, insns, 8);
148 */
149
47 : LiveProcess(params, objFile)
48{
49 stack_base = 0xc0000000L;
50
51 // Set pointer for next thread stack. Reserve 8M for main stack.
52 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
53
54 // Set up break point (Top of Heap)

--- 86 unchanged lines hidden (view full) ---

141
142 /*
143 //uint8_t insns[] = {0xe5, 0x9f, 0x00, 0x08, 0xe1, 0xa0, 0xf0, 0x0e};
144 uint8_t insns[] = {0x08, 0x00, 0x9f, 0xe5, 0x0e, 0xf0, 0xa0, 0xe1};
145
146 initVirtMem->writeBlob(0xffff0fe0, insns, 8);
147 */
148
150 threadContexts[0]->setIntReg(ArgumentReg1, argc);
151 threadContexts[0]->setIntReg(ArgumentReg2, argv_array_base);
152 threadContexts[0]->setIntReg(StackPointerReg, stack_min);
149 ThreadContext *tc = system->getThreadContext(contextIds[0]);
153
150
151 tc->setIntReg(ArgumentReg1, argc);
152 tc->setIntReg(ArgumentReg2, argv_array_base);
153 tc->setIntReg(StackPointerReg, stack_min);
154
154 Addr prog_entry = objFile->entryPoint();
155 Addr prog_entry = objFile->entryPoint();
155 threadContexts[0]->setPC(prog_entry);
156 threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
156 tc->setPC(prog_entry);
157 tc->setNextPC(prog_entry + sizeof(MachInst));
157}
158
158}
159
160ArmISA::IntReg
161ArmLiveProcess::getSyscallArg(ThreadContext *tc, int i)
162{
163 assert(i < 4);
164 return tc->readIntReg(ArgumentReg0 + i);
165}
166
167void
168ArmLiveProcess::setSyscallArg(ThreadContext *tc,
169 int i, ArmISA::IntReg val)
170{
171 assert(i < 4);
172 tc->setIntReg(ArgumentReg0 + i, val);
173}
174
175void
176ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
177 SyscallReturn return_value)
178{
179 tc->setIntReg(ReturnValueReg, return_value.value());
180}