process.cc (11800:54436a1784dc) | process.cc (11851:824055fe6b30) |
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1/* 2 * Copyright (c) 2010, 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 45 unchanged lines hidden (view full) --- 54#include "sim/byteswap.hh" 55#include "sim/process_impl.hh" 56#include "sim/syscall_return.hh" 57#include "sim/system.hh" 58 59using namespace std; 60using namespace ArmISA; 61 | 1/* 2 * Copyright (c) 2010, 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 45 unchanged lines hidden (view full) --- 54#include "sim/byteswap.hh" 55#include "sim/process_impl.hh" 56#include "sim/syscall_return.hh" 57#include "sim/system.hh" 58 59using namespace std; 60using namespace ArmISA; 61 |
62ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile, 63 ObjectFile::Arch _arch) 64 : LiveProcess(params, objFile), arch(_arch) | 62ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile, 63 ObjectFile::Arch _arch) 64 : Process(params, objFile), arch(_arch) |
65{ 66} 67 | 65{ 66} 67 |
68ArmLiveProcess32::ArmLiveProcess32(LiveProcessParams *params, 69 ObjectFile *objFile, ObjectFile::Arch _arch) 70 : ArmLiveProcess(params, objFile, _arch) | 68ArmProcess32::ArmProcess32(ProcessParams *params, ObjectFile *objFile, 69 ObjectFile::Arch _arch) 70 : ArmProcess(params, objFile, _arch) |
71{ 72 stack_base = 0xbf000000L; 73 74 // Set pointer for next thread stack. Reserve 8M for main stack. 75 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 76 77 // Set up break point (Top of Heap) 78 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 79 brk_point = roundUp(brk_point, PageBytes); 80 81 // Set up region for mmaps. For now, start at bottom of kuseg space. 82 mmap_end = 0x40000000L; 83} 84 | 71{ 72 stack_base = 0xbf000000L; 73 74 // Set pointer for next thread stack. Reserve 8M for main stack. 75 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 76 77 // Set up break point (Top of Heap) 78 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 79 brk_point = roundUp(brk_point, PageBytes); 80 81 // Set up region for mmaps. For now, start at bottom of kuseg space. 82 mmap_end = 0x40000000L; 83} 84 |
85ArmLiveProcess64::ArmLiveProcess64(LiveProcessParams *params, 86 ObjectFile *objFile, ObjectFile::Arch _arch) 87 : ArmLiveProcess(params, objFile, _arch) | 85ArmProcess64::ArmProcess64(ProcessParams *params, ObjectFile *objFile, 86 ObjectFile::Arch _arch) 87 : ArmProcess(params, objFile, _arch) |
88{ 89 stack_base = 0x7fffff0000L; 90 91 // Set pointer for next thread stack. Reserve 8M for main stack. 92 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 93 94 // Set up break point (Top of Heap) 95 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 96 brk_point = roundUp(brk_point, PageBytes); 97 98 // Set up region for mmaps. For now, start at bottom of kuseg space. 99 mmap_end = 0x4000000000L; 100} 101 102void | 88{ 89 stack_base = 0x7fffff0000L; 90 91 // Set pointer for next thread stack. Reserve 8M for main stack. 92 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 93 94 // Set up break point (Top of Heap) 95 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 96 brk_point = roundUp(brk_point, PageBytes); 97 98 // Set up region for mmaps. For now, start at bottom of kuseg space. 99 mmap_end = 0x4000000000L; 100} 101 102void |
103ArmLiveProcess32::initState() | 103ArmProcess32::initState() |
104{ | 104{ |
105 LiveProcess::initState(); | 105 Process::initState(); |
106 argsInit<uint32_t>(PageBytes, INTREG_SP); 107 for (int i = 0; i < contextIds.size(); i++) { 108 ThreadContext * tc = system->getThreadContext(contextIds[i]); 109 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR); 110 // Enable the floating point coprocessors. 111 cpacr.cp10 = 0x3; 112 cpacr.cp11 = 0x3; 113 tc->setMiscReg(MISCREG_CPACR, cpacr); 114 // Generically enable floating point support. 115 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 116 fpexc.en = 1; 117 tc->setMiscReg(MISCREG_FPEXC, fpexc); 118 } 119} 120 121void | 106 argsInit<uint32_t>(PageBytes, INTREG_SP); 107 for (int i = 0; i < contextIds.size(); i++) { 108 ThreadContext * tc = system->getThreadContext(contextIds[i]); 109 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR); 110 // Enable the floating point coprocessors. 111 cpacr.cp10 = 0x3; 112 cpacr.cp11 = 0x3; 113 tc->setMiscReg(MISCREG_CPACR, cpacr); 114 // Generically enable floating point support. 115 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 116 fpexc.en = 1; 117 tc->setMiscReg(MISCREG_FPEXC, fpexc); 118 } 119} 120 121void |
122ArmLiveProcess64::initState() | 122ArmProcess64::initState() |
123{ | 123{ |
124 LiveProcess::initState(); | 124 Process::initState(); |
125 argsInit<uint64_t>(PageBytes, INTREG_SP0); 126 for (int i = 0; i < contextIds.size(); i++) { 127 ThreadContext * tc = system->getThreadContext(contextIds[i]); 128 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); 129 cpsr.mode = MODE_EL0T; 130 tc->setMiscReg(MISCREG_CPSR, cpsr); 131 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1); 132 // Enable the floating point coprocessors. --- 4 unchanged lines hidden (view full) --- 137 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 138 fpexc.en = 1; 139 tc->setMiscReg(MISCREG_FPEXC, fpexc); 140 } 141} 142 143template <class IntType> 144void | 125 argsInit<uint64_t>(PageBytes, INTREG_SP0); 126 for (int i = 0; i < contextIds.size(); i++) { 127 ThreadContext * tc = system->getThreadContext(contextIds[i]); 128 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); 129 cpsr.mode = MODE_EL0T; 130 tc->setMiscReg(MISCREG_CPSR, cpsr); 131 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1); 132 // Enable the floating point coprocessors. --- 4 unchanged lines hidden (view full) --- 137 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 138 fpexc.en = 1; 139 tc->setMiscReg(MISCREG_FPEXC, fpexc); 140 } 141} 142 143template <class IntType> 144void |
145ArmLiveProcess::argsInit(int pageSize, IntRegIndex spIndex) | 145ArmProcess::argsInit(int pageSize, IntRegIndex spIndex) |
146{ 147 int intSize = sizeof(IntType); 148 149 typedef AuxVector<IntType> auxv_t; 150 std::vector<auxv_t> auxv; 151 152 string filename; 153 if (argv.size() < 1) --- 246 unchanged lines hidden (view full) --- 400 pc.set(getStartPC() & ~mask(1)); 401 tc->pcState(pc); 402 403 //Align the "stack_min" to a page boundary. 404 stack_min = roundDown(stack_min, pageSize); 405} 406 407ArmISA::IntReg | 146{ 147 int intSize = sizeof(IntType); 148 149 typedef AuxVector<IntType> auxv_t; 150 std::vector<auxv_t> auxv; 151 152 string filename; 153 if (argv.size() < 1) --- 246 unchanged lines hidden (view full) --- 400 pc.set(getStartPC() & ~mask(1)); 401 tc->pcState(pc); 402 403 //Align the "stack_min" to a page boundary. 404 stack_min = roundDown(stack_min, pageSize); 405} 406 407ArmISA::IntReg |
408ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i) | 408ArmProcess32::getSyscallArg(ThreadContext *tc, int &i) |
409{ 410 assert(i < 6); 411 return tc->readIntReg(ArgumentReg0 + i++); 412} 413 414ArmISA::IntReg | 409{ 410 assert(i < 6); 411 return tc->readIntReg(ArgumentReg0 + i++); 412} 413 414ArmISA::IntReg |
415ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i) | 415ArmProcess64::getSyscallArg(ThreadContext *tc, int &i) |
416{ 417 assert(i < 8); 418 return tc->readIntReg(ArgumentReg0 + i++); 419} 420 421ArmISA::IntReg | 416{ 417 assert(i < 8); 418 return tc->readIntReg(ArgumentReg0 + i++); 419} 420 421ArmISA::IntReg |
422ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i, int width) | 422ArmProcess32::getSyscallArg(ThreadContext *tc, int &i, int width) |
423{ 424 assert(width == 32 || width == 64); 425 if (width == 32) 426 return getSyscallArg(tc, i); 427 428 // 64 bit arguments are passed starting in an even register 429 if (i % 2 != 0) 430 i++; 431 432 // Registers r0-r6 can be used 433 assert(i < 5); 434 uint64_t val; 435 val = tc->readIntReg(ArgumentReg0 + i++); 436 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32); 437 return val; 438} 439 440ArmISA::IntReg | 423{ 424 assert(width == 32 || width == 64); 425 if (width == 32) 426 return getSyscallArg(tc, i); 427 428 // 64 bit arguments are passed starting in an even register 429 if (i % 2 != 0) 430 i++; 431 432 // Registers r0-r6 can be used 433 assert(i < 5); 434 uint64_t val; 435 val = tc->readIntReg(ArgumentReg0 + i++); 436 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32); 437 return val; 438} 439 440ArmISA::IntReg |
441ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i, int width) | 441ArmProcess64::getSyscallArg(ThreadContext *tc, int &i, int width) |
442{ 443 return getSyscallArg(tc, i); 444} 445 446 447void | 442{ 443 return getSyscallArg(tc, i); 444} 445 446 447void |
448ArmLiveProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val) | 448ArmProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val) |
449{ 450 assert(i < 6); 451 tc->setIntReg(ArgumentReg0 + i, val); 452} 453 454void | 449{ 450 assert(i < 6); 451 tc->setIntReg(ArgumentReg0 + i, val); 452} 453 454void |
455ArmLiveProcess64::setSyscallArg(ThreadContext *tc, 456 int i, ArmISA::IntReg val) | 455ArmProcess64::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val) |
457{ 458 assert(i < 8); 459 tc->setIntReg(ArgumentReg0 + i, val); 460} 461 462void | 456{ 457 assert(i < 8); 458 tc->setIntReg(ArgumentReg0 + i, val); 459} 460 461void |
463ArmLiveProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) | 462ArmProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) |
464{ 465 466 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 467 // Decode return value 468 if (sysret.encodedValue() >= 0) 469 // FreeBSD checks the carry bit to determine if syscall is succeeded 470 tc->setCCReg(CCREG_C, 0); 471 else { 472 sysret = -sysret.encodedValue(); 473 } 474 } 475 476 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 477} 478 479void | 463{ 464 465 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 466 // Decode return value 467 if (sysret.encodedValue() >= 0) 468 // FreeBSD checks the carry bit to determine if syscall is succeeded 469 tc->setCCReg(CCREG_C, 0); 470 else { 471 sysret = -sysret.encodedValue(); 472 } 473 } 474 475 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 476} 477 478void |
480ArmLiveProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) | 479ArmProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) |
481{ 482 483 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 484 // Decode return value 485 if (sysret.encodedValue() >= 0) 486 // FreeBSD checks the carry bit to determine if syscall is succeeded 487 tc->setCCReg(CCREG_C, 0); 488 else { 489 sysret = -sysret.encodedValue(); 490 } 491 } 492 493 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 494} | 480{ 481 482 if (objFile->getOpSys() == ObjectFile::FreeBSD) { 483 // Decode return value 484 if (sysret.encodedValue() >= 0) 485 // FreeBSD checks the carry bit to determine if syscall is succeeded 486 tc->setCCReg(CCREG_C, 0); 487 else { 488 sysret = -sysret.encodedValue(); 489 } 490 } 491 492 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 493} |