1/*
2 * Copyright (c) 2010, 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2007-2008 The Florida State University
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Stephen Hines
41 * Ali Saidi
42 */
43
44#include "arch/arm/process.hh"
45
46#include "arch/arm/isa_traits.hh"
47#include "arch/arm/types.hh"
48#include "base/loader/elf_object.hh"
49#include "base/loader/object_file.hh"
50#include "base/misc.hh"
51#include "cpu/thread_context.hh"
52#include "debug/Stack.hh"
53#include "mem/page_table.hh"
54#include "sim/aux_vector.hh"
55#include "sim/byteswap.hh"
56#include "sim/process_impl.hh"
57#include "sim/syscall_return.hh"
58#include "sim/system.hh"
59
60using namespace std;
61using namespace ArmISA;
62
63ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile,
64 ObjectFile::Arch _arch)
65 : Process(params, objFile), arch(_arch)
66{
67}
68
69ArmProcess32::ArmProcess32(ProcessParams *params, ObjectFile *objFile,
70 ObjectFile::Arch _arch)
71 : ArmProcess(params, objFile, _arch)
72{
73 stack_base = 0xbf000000L;
73 memState->stackBase = 0xbf000000L;
74
75 // Set pointer for next thread stack. Reserve 8M for main stack.
76 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
76 memState->nextThreadStackBase = memState->stackBase - (8 * 1024 * 1024);
77
78 // Set up break point (Top of Heap)
79 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
80 brk_point = roundUp(brk_point, PageBytes);
79 memState->brkPoint = objFile->dataBase() + objFile->dataSize() +
80 objFile->bssSize();
81 memState->brkPoint = roundUp(memState->brkPoint, PageBytes);
82
83 // Set up region for mmaps. For now, start at bottom of kuseg space.
83 mmap_end = 0x40000000L;
84 memState->mmapEnd = 0x40000000L;
85}
86
87ArmProcess64::ArmProcess64(ProcessParams *params, ObjectFile *objFile,
88 ObjectFile::Arch _arch)
89 : ArmProcess(params, objFile, _arch)
90{
90 stack_base = 0x7fffff0000L;
91 memState->stackBase = 0x7fffff0000L;
92
93 // Set pointer for next thread stack. Reserve 8M for main stack.
93 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
94 memState->nextThreadStackBase = memState->stackBase - (8 * 1024 * 1024);
95
96 // Set up break point (Top of Heap)
96 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
97 brk_point = roundUp(brk_point, PageBytes);
97 memState->brkPoint = objFile->dataBase() + objFile->dataSize() +
98 objFile->bssSize();
99 memState->brkPoint = roundUp(memState->brkPoint, PageBytes);
100
101 // Set up region for mmaps. For now, start at bottom of kuseg space.
100 mmap_end = 0x4000000000L;
102 memState->mmapEnd = 0x4000000000L;
103}
104
105void
106ArmProcess32::initState()
107{
108 Process::initState();
109 argsInit<uint32_t>(PageBytes, INTREG_SP);
110 for (int i = 0; i < contextIds.size(); i++) {
111 ThreadContext * tc = system->getThreadContext(contextIds[i]);
112 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR);
113 // Enable the floating point coprocessors.
114 cpacr.cp10 = 0x3;
115 cpacr.cp11 = 0x3;
116 tc->setMiscReg(MISCREG_CPACR, cpacr);
117 // Generically enable floating point support.
118 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
119 fpexc.en = 1;
120 tc->setMiscReg(MISCREG_FPEXC, fpexc);
121 }
122}
123
124void
125ArmProcess64::initState()
126{
127 Process::initState();
128 argsInit<uint64_t>(PageBytes, INTREG_SP0);
129 for (int i = 0; i < contextIds.size(); i++) {
130 ThreadContext * tc = system->getThreadContext(contextIds[i]);
131 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
132 cpsr.mode = MODE_EL0T;
133 tc->setMiscReg(MISCREG_CPSR, cpsr);
134 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1);
135 // Enable the floating point coprocessors.
136 cpacr.cp10 = 0x3;
137 cpacr.cp11 = 0x3;
138 tc->setMiscReg(MISCREG_CPACR_EL1, cpacr);
139 // Generically enable floating point support.
140 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
141 fpexc.en = 1;
142 tc->setMiscReg(MISCREG_FPEXC, fpexc);
143 }
144}
145
146template <class IntType>
147void
148ArmProcess::argsInit(int pageSize, IntRegIndex spIndex)
149{
150 int intSize = sizeof(IntType);
151
152 typedef AuxVector<IntType> auxv_t;
153 std::vector<auxv_t> auxv;
154
155 string filename;
156 if (argv.size() < 1)
157 filename = "";
158 else
159 filename = argv[0];
160
161 //We want 16 byte alignment
162 uint64_t align = 16;
163
164 // Patch the ld_bias for dynamic executables.
165 updateBias();
166
167 // load object file into target memory
168 objFile->loadSections(initVirtMem);
169
170 enum ArmCpuFeature {
171 Arm_Swp = 1 << 0,
172 Arm_Half = 1 << 1,
173 Arm_Thumb = 1 << 2,
174 Arm_26Bit = 1 << 3,
175 Arm_FastMult = 1 << 4,
176 Arm_Fpa = 1 << 5,
177 Arm_Vfp = 1 << 6,
178 Arm_Edsp = 1 << 7,
179 Arm_Java = 1 << 8,
180 Arm_Iwmmxt = 1 << 9,
181 Arm_Crunch = 1 << 10,
182 Arm_ThumbEE = 1 << 11,
183 Arm_Neon = 1 << 12,
184 Arm_Vfpv3 = 1 << 13,
185 Arm_Vfpv3d16 = 1 << 14
186 };
187
188 //Setup the auxilliary vectors. These will already have endian conversion.
189 //Auxilliary vectors are loaded only for elf formatted executables.
190 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
191 if (elfObject) {
192
193 if (objFile->getOpSys() == ObjectFile::Linux) {
194 IntType features =
195 Arm_Swp |
196 Arm_Half |
197 Arm_Thumb |
198// Arm_26Bit |
199 Arm_FastMult |
200// Arm_Fpa |
201 Arm_Vfp |
202 Arm_Edsp |
203// Arm_Java |
204// Arm_Iwmmxt |
205// Arm_Crunch |
206 Arm_ThumbEE |
207 Arm_Neon |
208 Arm_Vfpv3 |
209 Arm_Vfpv3d16 |
210 0;
211
212 //Bits which describe the system hardware capabilities
213 //XXX Figure out what these should be
214 auxv.push_back(auxv_t(M5_AT_HWCAP, features));
215 //Frequency at which times() increments
216 auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
217 //Whether to enable "secure mode" in the executable
218 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
219 // Pointer to 16 bytes of random data
220 auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
221 //The filename of the program
222 auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
223 //The string "v71" -- ARM v7 architecture
224 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
225 }
226
227 //The system page size
228 auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::PageBytes));
229 // For statically linked executables, this is the virtual address of the
230 // program header tables if they appear in the executable image
231 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
232 // This is the size of a program header entry from the elf file.
233 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
234 // This is the number of program headers from the original elf file.
235 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
236 // This is the base address of the ELF interpreter; it should be
237 // zero for static executables or contain the base address for
238 // dynamic executables.
239 auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
240 //XXX Figure out what this should be.
241 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
242 //The entry point to the program
243 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
244 //Different user and group IDs
245 auxv.push_back(auxv_t(M5_AT_UID, uid()));
246 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
247 auxv.push_back(auxv_t(M5_AT_GID, gid()));
248 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
249 }
250
251 //Figure out how big the initial stack nedes to be
252
253 // A sentry NULL void pointer at the top of the stack.
254 int sentry_size = intSize;
255
256 string platform = "v71";
257 int platform_size = platform.size() + 1;
258
259 // Bytes for AT_RANDOM above, we'll just keep them 0
260 int aux_random_size = 16; // as per the specification
261
262 // The aux vectors are put on the stack in two groups. The first group are
263 // the vectors that are generated as the elf is loaded. The second group
264 // are the ones that were computed ahead of time and include the platform
265 // string.
266 int aux_data_size = filename.size() + 1;
267
268 int env_data_size = 0;
269 for (int i = 0; i < envp.size(); ++i) {
270 env_data_size += envp[i].size() + 1;
271 }
272 int arg_data_size = 0;
273 for (int i = 0; i < argv.size(); ++i) {
274 arg_data_size += argv[i].size() + 1;
275 }
276
277 int info_block_size =
278 sentry_size + env_data_size + arg_data_size +
279 aux_data_size + platform_size + aux_random_size;
280
281 //Each auxilliary vector is two 4 byte words
282 int aux_array_size = intSize * 2 * (auxv.size() + 1);
283
284 int envp_array_size = intSize * (envp.size() + 1);
285 int argv_array_size = intSize * (argv.size() + 1);
286
287 int argc_size = intSize;
288
289 //Figure out the size of the contents of the actual initial frame
290 int frame_size =
291 info_block_size +
292 aux_array_size +
293 envp_array_size +
294 argv_array_size +
295 argc_size;
296
297 //There needs to be padding after the auxiliary vector data so that the
298 //very bottom of the stack is aligned properly.
299 int partial_size = frame_size;
300 int aligned_partial_size = roundUp(partial_size, align);
301 int aux_padding = aligned_partial_size - partial_size;
302
303 int space_needed = frame_size + aux_padding;
304
303 stack_min = stack_base - space_needed;
304 stack_min = roundDown(stack_min, align);
305 stack_size = stack_base - stack_min;
305 memState->stackMin = memState->stackBase - space_needed;
306 memState->stackMin = roundDown(memState->stackMin, align);
307 memState->stackSize = memState->stackBase - memState->stackMin;
308
309 // map memory
308 allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize));
310 allocateMem(roundDown(memState->stackMin, pageSize),
311 roundUp(memState->stackSize, pageSize));
312
313 // map out initial stack contents
311 IntType sentry_base = stack_base - sentry_size;
314 IntType sentry_base = memState->stackBase - sentry_size;
315 IntType aux_data_base = sentry_base - aux_data_size;
316 IntType env_data_base = aux_data_base - env_data_size;
317 IntType arg_data_base = env_data_base - arg_data_size;
318 IntType platform_base = arg_data_base - platform_size;
319 IntType aux_random_base = platform_base - aux_random_size;
320 IntType auxv_array_base = aux_random_base - aux_array_size - aux_padding;
321 IntType envp_array_base = auxv_array_base - envp_array_size;
322 IntType argv_array_base = envp_array_base - argv_array_size;
323 IntType argc_base = argv_array_base - argc_size;
324
325 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
326 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
327 DPRINTF(Stack, "0x%x - env data\n", env_data_base);
328 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
329 DPRINTF(Stack, "0x%x - random data\n", aux_random_base);
330 DPRINTF(Stack, "0x%x - platform base\n", platform_base);
331 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
332 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
333 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
334 DPRINTF(Stack, "0x%x - argc \n", argc_base);
332 DPRINTF(Stack, "0x%x - stack min\n", stack_min);
335 DPRINTF(Stack, "0x%x - stack min\n", memState->stackMin);
336
337 // write contents to stack
338
339 // figure out argc
340 IntType argc = argv.size();
341 IntType guestArgc = ArmISA::htog(argc);
342
343 //Write out the sentry void *
344 IntType sentry_NULL = 0;
345 initVirtMem.writeBlob(sentry_base,
346 (uint8_t*)&sentry_NULL, sentry_size);
347
348 //Fix up the aux vectors which point to other data
349 for (int i = auxv.size() - 1; i >= 0; i--) {
350 if (auxv[i].a_type == M5_AT_PLATFORM) {
351 auxv[i].a_val = platform_base;
352 initVirtMem.writeString(platform_base, platform.c_str());
353 } else if (auxv[i].a_type == M5_AT_EXECFN) {
354 auxv[i].a_val = aux_data_base;
355 initVirtMem.writeString(aux_data_base, filename.c_str());
356 } else if (auxv[i].a_type == M5_AT_RANDOM) {
357 auxv[i].a_val = aux_random_base;
358 // Just leave the value 0, we don't want randomness
359 }
360 }
361
362 //Copy the aux stuff
363 for (int x = 0; x < auxv.size(); x++) {
364 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
365 (uint8_t*)&(auxv[x].a_type), intSize);
366 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
367 (uint8_t*)&(auxv[x].a_val), intSize);
368 }
369 //Write out the terminating zeroed auxilliary vector
370 const uint64_t zero = 0;
371 initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
372 (uint8_t*)&zero, 2 * intSize);
373
374 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
375 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
376
377 initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
378
379 ThreadContext *tc = system->getThreadContext(contextIds[0]);
380 //Set the stack pointer register
378 tc->setIntReg(spIndex, stack_min);
381 tc->setIntReg(spIndex, memState->stackMin);
382 //A pointer to a function to run when the program exits. We'll set this
383 //to zero explicitly to make sure this isn't used.
384 tc->setIntReg(ArgumentReg0, 0);
385 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively
386 if (argv.size() > 0) {
387 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size -
388 argv[argv.size() - 1].size() - 1);
389 } else {
390 tc->setIntReg(ArgumentReg1, 0);
391 }
392 if (envp.size() > 0) {
393 tc->setIntReg(ArgumentReg2, env_data_base + env_data_size -
394 envp[envp.size() - 1].size() - 1);
395 } else {
396 tc->setIntReg(ArgumentReg2, 0);
397 }
398
399 PCState pc;
400 pc.thumb(arch == ObjectFile::Thumb);
401 pc.nextThumb(pc.thumb());
402 pc.aarch64(arch == ObjectFile::Arm64);
403 pc.nextAArch64(pc.aarch64());
404 pc.set(getStartPC() & ~mask(1));
405 tc->pcState(pc);
406
404 //Align the "stack_min" to a page boundary.
405 stack_min = roundDown(stack_min, pageSize);
407 //Align the "stackMin" to a page boundary.
408 memState->stackMin = roundDown(memState->stackMin, pageSize);
409}
410
411ArmISA::IntReg
412ArmProcess32::getSyscallArg(ThreadContext *tc, int &i)
413{
414 assert(i < 6);
415 return tc->readIntReg(ArgumentReg0 + i++);
416}
417
418ArmISA::IntReg
419ArmProcess64::getSyscallArg(ThreadContext *tc, int &i)
420{
421 assert(i < 8);
422 return tc->readIntReg(ArgumentReg0 + i++);
423}
424
425ArmISA::IntReg
426ArmProcess32::getSyscallArg(ThreadContext *tc, int &i, int width)
427{
428 assert(width == 32 || width == 64);
429 if (width == 32)
430 return getSyscallArg(tc, i);
431
432 // 64 bit arguments are passed starting in an even register
433 if (i % 2 != 0)
434 i++;
435
436 // Registers r0-r6 can be used
437 assert(i < 5);
438 uint64_t val;
439 val = tc->readIntReg(ArgumentReg0 + i++);
440 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32);
441 return val;
442}
443
444ArmISA::IntReg
445ArmProcess64::getSyscallArg(ThreadContext *tc, int &i, int width)
446{
447 return getSyscallArg(tc, i);
448}
449
450
451void
452ArmProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val)
453{
454 assert(i < 6);
455 tc->setIntReg(ArgumentReg0 + i, val);
456}
457
458void
459ArmProcess64::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val)
460{
461 assert(i < 8);
462 tc->setIntReg(ArgumentReg0 + i, val);
463}
464
465void
466ArmProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
467{
468
469 if (objFile->getOpSys() == ObjectFile::FreeBSD) {
470 // Decode return value
471 if (sysret.encodedValue() >= 0)
472 // FreeBSD checks the carry bit to determine if syscall is succeeded
473 tc->setCCReg(CCREG_C, 0);
474 else {
475 sysret = -sysret.encodedValue();
476 }
477 }
478
479 tc->setIntReg(ReturnValueReg, sysret.encodedValue());
480}
481
482void
483ArmProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
484{
485
486 if (objFile->getOpSys() == ObjectFile::FreeBSD) {
487 // Decode return value
488 if (sysret.encodedValue() >= 0)
489 // FreeBSD checks the carry bit to determine if syscall is succeeded
490 tc->setCCReg(CCREG_C, 0);
491 else {
492 sysret = -sysret.encodedValue();
493 }
494 }
495
496 tc->setIntReg(ReturnValueReg, sysret.encodedValue());
497}