1/*
2 * Copyright (c) 2010, 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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56
57using namespace std;
58using namespace ArmISA;
59
60ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile,
61 ObjectFile::Arch _arch)
62 : LiveProcess(params, objFile), arch(_arch)
63{
64}
65
66ArmLiveProcess32::ArmLiveProcess32(LiveProcessParams *params,
67 ObjectFile *objFile, ObjectFile::Arch _arch)
68 : ArmLiveProcess(params, objFile, _arch)
69{
70 stack_base = 0xbf000000L;
71
72 // Set pointer for next thread stack. Reserve 8M for main stack.
73 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
74
75 // Set up break point (Top of Heap)
76 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
77 brk_point = roundUp(brk_point, VMPageSize);
78
79 // Set up region for mmaps. For now, start at bottom of kuseg space.
80 mmap_start = mmap_end = 0x40000000L;
81}
82
83ArmLiveProcess64::ArmLiveProcess64(LiveProcessParams *params,
84 ObjectFile *objFile, ObjectFile::Arch _arch)
85 : ArmLiveProcess(params, objFile, _arch)
86{
87 stack_base = 0x7fffff0000L;
88
89 // Set pointer for next thread stack. Reserve 8M for main stack.
90 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
91
92 // Set up break point (Top of Heap)
93 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
94 brk_point = roundUp(brk_point, VMPageSize);
95
96 // Set up region for mmaps. For now, start at bottom of kuseg space.
97 mmap_start = mmap_end = 0x4000000000L;
98}
99
100void
101ArmLiveProcess32::initState()
102{
103 LiveProcess::initState();
104 argsInit<uint32_t>(VMPageSize, INTREG_SP);
105 for (int i = 0; i < contextIds.size(); i++) {
106 ThreadContext * tc = system->getThreadContext(contextIds[i]);
107 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR);
108 // Enable the floating point coprocessors.
109 cpacr.cp10 = 0x3;
110 cpacr.cp11 = 0x3;
111 tc->setMiscReg(MISCREG_CPACR, cpacr);
112 // Generically enable floating point support.
113 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
114 fpexc.en = 1;
115 tc->setMiscReg(MISCREG_FPEXC, fpexc);
116 }
117}
118
119void
120ArmLiveProcess64::initState()
121{
122 LiveProcess::initState();
123 argsInit<uint64_t>(VMPageSize, INTREG_SP0);
124 for (int i = 0; i < contextIds.size(); i++) {
125 ThreadContext * tc = system->getThreadContext(contextIds[i]);
126 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
127 cpsr.mode = MODE_EL0T;
128 tc->setMiscReg(MISCREG_CPSR, cpsr);
129 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1);
130 // Enable the floating point coprocessors.
131 cpacr.cp10 = 0x3;
132 cpacr.cp11 = 0x3;
133 tc->setMiscReg(MISCREG_CPACR_EL1, cpacr);
134 // Generically enable floating point support.
135 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
136 fpexc.en = 1;
137 tc->setMiscReg(MISCREG_FPEXC, fpexc);
138 }
139}
140
141template <class IntType>
142void
143ArmLiveProcess::argsInit(int pageSize, IntRegIndex spIndex)
144{
145 int intSize = sizeof(IntType);
146
147 typedef AuxVector<IntType> auxv_t;
148 std::vector<auxv_t> auxv;
149
150 string filename;
151 if (argv.size() < 1)
152 filename = "";
153 else
154 filename = argv[0];
155

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176 Arm_Vfpv3 = 1 << 13,
177 Arm_Vfpv3d16 = 1 << 14
178 };
179
180 //Setup the auxilliary vectors. These will already have endian conversion.
181 //Auxilliary vectors are loaded only for elf formatted executables.
182 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
183 if (elfObject) {
184 IntType features =
185 Arm_Swp |
186 Arm_Half |
187 Arm_Thumb |
188// Arm_26Bit |
189 Arm_FastMult |
190// Arm_Fpa |
191 Arm_Vfp |
192 Arm_Edsp |

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296 stack_min = stack_base - space_needed;
297 stack_min = roundDown(stack_min, align);
298 stack_size = stack_base - stack_min;
299
300 // map memory
301 allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize));
302
303 // map out initial stack contents
304 IntType sentry_base = stack_base - sentry_size;
305 IntType aux_data_base = sentry_base - aux_data_size;
306 IntType env_data_base = aux_data_base - env_data_size;
307 IntType arg_data_base = env_data_base - arg_data_size;
308 IntType platform_base = arg_data_base - platform_size;
309 IntType aux_random_base = platform_base - aux_random_size;
310 IntType auxv_array_base = aux_random_base - aux_array_size - aux_padding;
311 IntType envp_array_base = auxv_array_base - envp_array_size;
312 IntType argv_array_base = envp_array_base - argv_array_size;
313 IntType argc_base = argv_array_base - argc_size;
314
315 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
316 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
317 DPRINTF(Stack, "0x%x - env data\n", env_data_base);
318 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
319 DPRINTF(Stack, "0x%x - random data\n", aux_random_base);
320 DPRINTF(Stack, "0x%x - platform base\n", platform_base);
321 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
322 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
323 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
324 DPRINTF(Stack, "0x%x - argc \n", argc_base);
325 DPRINTF(Stack, "0x%x - stack min\n", stack_min);
326
327 // write contents to stack
328
329 // figure out argc
330 IntType argc = argv.size();
331 IntType guestArgc = ArmISA::htog(argc);
332
333 //Write out the sentry void *
334 IntType sentry_NULL = 0;
335 initVirtMem.writeBlob(sentry_base,
336 (uint8_t*)&sentry_NULL, sentry_size);
337
338 //Fix up the aux vectors which point to other data
339 for (int i = auxv.size() - 1; i >= 0; i--) {
340 if (auxv[i].a_type == M5_AT_PLATFORM) {
341 auxv[i].a_val = platform_base;
342 initVirtMem.writeString(platform_base, platform.c_str());
343 } else if (auxv[i].a_type == M5_AT_EXECFN) {
344 auxv[i].a_val = aux_data_base;
345 initVirtMem.writeString(aux_data_base, filename.c_str());
346 } else if (auxv[i].a_type == M5_AT_RANDOM) {
347 auxv[i].a_val = aux_random_base;
348 // Just leave the value 0, we don't want randomness
349 }
350 }
351
352 //Copy the aux stuff
353 for (int x = 0; x < auxv.size(); x++) {
354 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
355 (uint8_t*)&(auxv[x].a_type), intSize);
356 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
357 (uint8_t*)&(auxv[x].a_val), intSize);
358 }
359 //Write out the terminating zeroed auxilliary vector
360 const uint64_t zero = 0;
361 initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
362 (uint8_t*)&zero, 2 * intSize);
363
364 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
365 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
366
367 initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
368
369 ThreadContext *tc = system->getThreadContext(contextIds[0]);
370 //Set the stack pointer register
371 tc->setIntReg(spIndex, stack_min);
372 //A pointer to a function to run when the program exits. We'll set this
373 //to zero explicitly to make sure this isn't used.
374 tc->setIntReg(ArgumentReg0, 0);
375 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively
376 if (argv.size() > 0) {
377 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size -
378 argv[argv.size() - 1].size() - 1);
379 } else {

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384 envp[envp.size() - 1].size() - 1);
385 } else {
386 tc->setIntReg(ArgumentReg2, 0);
387 }
388
389 PCState pc;
390 pc.thumb(arch == ObjectFile::Thumb);
391 pc.nextThumb(pc.thumb());
392 pc.aarch64(arch == ObjectFile::Arm64);
393 pc.nextAArch64(pc.aarch64());
394 pc.set(objFile->entryPoint() & ~mask(1));
395 tc->pcState(pc);
396
397 //Align the "stack_min" to a page boundary.
398 stack_min = roundDown(stack_min, pageSize);
399}
400
401ArmISA::IntReg
402ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i)
403{
404 assert(i < 6);
405 return tc->readIntReg(ArgumentReg0 + i++);
406}
407
408ArmISA::IntReg
409ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i)
410{
411 assert(i < 8);
412 return tc->readIntReg(ArgumentReg0 + i++);
413}
414
415ArmISA::IntReg
416ArmLiveProcess32::getSyscallArg(ThreadContext *tc, int &i, int width)
417{
418 assert(width == 32 || width == 64);
419 if (width == 32)
420 return getSyscallArg(tc, i);
421
422 // 64 bit arguments are passed starting in an even register
423 if (i % 2 != 0)
424 i++;
425
426 // Registers r0-r6 can be used
427 assert(i < 5);
428 uint64_t val;
429 val = tc->readIntReg(ArgumentReg0 + i++);
430 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32);
431 return val;
432}
433
434ArmISA::IntReg
435ArmLiveProcess64::getSyscallArg(ThreadContext *tc, int &i, int width)
436{
437 return getSyscallArg(tc, i);
438}
439
440
441void
442ArmLiveProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val)
443{
444 assert(i < 6);
445 tc->setIntReg(ArgumentReg0 + i, val);
446}
447
448void
449ArmLiveProcess64::setSyscallArg(ThreadContext *tc,
450 int i, ArmISA::IntReg val)
451{
452 assert(i < 8);
453 tc->setIntReg(ArgumentReg0 + i, val);
454}
455
456void
457ArmLiveProcess32::setSyscallReturn(ThreadContext *tc,
458 SyscallReturn return_value)
459{
460 tc->setIntReg(ReturnValueReg, return_value.value());
461}
462
463void
464ArmLiveProcess64::setSyscallReturn(ThreadContext *tc,
465 SyscallReturn return_value)
466{
467 tc->setIntReg(ReturnValueReg, return_value.value());
468}