nativetrace.cc (10037:5cac77888310) nativetrace.cc (10338:8bee5f4edb92)
1/*
1/*
2 * Copyright (c) 2010-2011 ARM Limited
2 * Copyright (c) 2010-2011, 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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111 }
112
113 //R15, aliased with the PC
114 newState[STATE_PC] = tc->pcState().npc();
115 changed[STATE_PC] = (newState[STATE_PC] != oldState[STATE_PC]);
116
117 //CPSR
118 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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111 }
112
113 //R15, aliased with the PC
114 newState[STATE_PC] = tc->pcState().npc();
115 changed[STATE_PC] = (newState[STATE_PC] != oldState[STATE_PC]);
116
117 //CPSR
118 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
119 cpsr.nz = tc->readIntReg(INTREG_CONDCODES_NZ);
120 cpsr.c = tc->readIntReg(INTREG_CONDCODES_C);
121 cpsr.v = tc->readIntReg(INTREG_CONDCODES_V);
122 cpsr.ge = tc->readIntReg(INTREG_CONDCODES_GE);
119 cpsr.nz = tc->readCCReg(CCREG_NZ);
120 cpsr.c = tc->readCCReg(CCREG_C);
121 cpsr.v = tc->readCCReg(CCREG_V);
122 cpsr.ge = tc->readCCReg(CCREG_GE);
123
124 newState[STATE_CPSR] = cpsr;
125 changed[STATE_CPSR] = (newState[STATE_CPSR] != oldState[STATE_CPSR]);
126
127 for (int i = 0; i < NumFloatV7ArchRegs; i += 2) {
128 newState[STATE_F0 + (i >> 1)] =
129 static_cast<uint64_t>(tc->readFloatRegBits(i + 1)) << 32 |
130 tc->readFloatRegBits(i);
131 }
132 newState[STATE_FPSCR] = tc->readMiscRegNoEffect(MISCREG_FPSCR) |
123
124 newState[STATE_CPSR] = cpsr;
125 changed[STATE_CPSR] = (newState[STATE_CPSR] != oldState[STATE_CPSR]);
126
127 for (int i = 0; i < NumFloatV7ArchRegs; i += 2) {
128 newState[STATE_F0 + (i >> 1)] =
129 static_cast<uint64_t>(tc->readFloatRegBits(i + 1)) << 32 |
130 tc->readFloatRegBits(i);
131 }
132 newState[STATE_FPSCR] = tc->readMiscRegNoEffect(MISCREG_FPSCR) |
133 tc->readIntReg(INTREG_FPCONDCODES);
133 tc->readCCReg(CCREG_FP);
134}
135
136void
137Trace::ArmNativeTrace::check(NativeTraceRecord *record)
138{
139 ThreadContext *tc = record->getThread();
140 // This area is read only on the target. It can't stop there to tell us
141 // what's going on, so we should skip over anything there also.

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135
136void
137Trace::ArmNativeTrace::check(NativeTraceRecord *record)
138{
139 ThreadContext *tc = record->getThread();
140 // This area is read only on the target. It can't stop there to tell us
141 // what's going on, so we should skip over anything there also.

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