1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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49#include "sim/byteswap.hh"
50
51namespace Trace {
52
53#if TRACING_ON
54static const char *regNames[] = {
55 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
56 "r8", "r9", "r10", "fp", "r12", "sp", "lr", "pc",
57 "cpsr"
58};
59#endif
60
61void
62Trace::ArmNativeTrace::ThreadState::update(NativeTrace *parent)
63{
64 oldState = state[current];
65 current = (current + 1) % 2;
66 newState = state[current];
67
68 memcpy(newState, oldState, sizeof(state[0]));
69
70 uint32_t diffVector;
71 parent->read(&diffVector, sizeof(diffVector));
72 diffVector = ArmISA::gtoh(diffVector);
73
74 int changes = 0;
75 for (int i = 0; i < STATE_NUMVALS; i++) {
76 if (diffVector & 0x1) {
77 changed[i] = true;
78 changes++;
79 } else {
80 changed[i] = false;
81 }
82 diffVector >>= 1;
83 }
84
85 uint32_t values[changes];
86 parent->read(values, sizeof(values));
87 int pos = 0;
88 for (int i = 0; i < STATE_NUMVALS; i++) {
89 if (changed[i]) {
90 newState[i] = ArmISA::gtoh(values[pos++]);
91 changed[i] = (newState[i] != oldState[i]);
92 }
93 }

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109 //R15, aliased with the PC
110 newState[STATE_PC] = tc->pcState().npc();
111 changed[STATE_PC] = (newState[STATE_PC] != oldState[STATE_PC]);
112
113 //CPSR
114 newState[STATE_CPSR] = tc->readMiscReg(MISCREG_CPSR) |
115 tc->readIntReg(INTREG_CONDCODES);
116 changed[STATE_CPSR] = (newState[STATE_CPSR] != oldState[STATE_CPSR]);
117}
118
119void
120Trace::ArmNativeTrace::check(NativeTraceRecord *record)
121{
122 ThreadContext *tc = record->getThread();
123 // This area is read only on the target. It can't stop there to tell us
124 // what's going on, so we should skip over anything there also.

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