miscregs.hh (8147:ac8ef72e9700) miscregs.hh (8179:bbab80b639cb)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 214 unchanged lines hidden (view full) ---

223 "itlbiall", "itlbimva", "itlbiasid",
224 "dtlbiall", "dtlbimva", "dtlbiasid",
225 "tlbiall", "tlbimva", "tlbiasid", "tlbimvaa",
226 "dfsr", "ifsr", "dfar", "ifar", "mpidr",
227 "prrr", "nmrr", "ttbcr", "id_pfr0", "ctr",
228 "scr", "sder", "par",
229 "v2pcwpr", "v2pcwpw", "v2pcwur", "v2pcwuw",
230 "v2powpr", "v2powpw", "v2powur", "v2powuw",
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 214 unchanged lines hidden (view full) ---

223 "itlbiall", "itlbimva", "itlbiasid",
224 "dtlbiall", "dtlbimva", "dtlbiasid",
225 "tlbiall", "tlbimva", "tlbiasid", "tlbimvaa",
226 "dfsr", "ifsr", "dfar", "ifar", "mpidr",
227 "prrr", "nmrr", "ttbcr", "id_pfr0", "ctr",
228 "scr", "sder", "par",
229 "v2pcwpr", "v2pcwpw", "v2pcwur", "v2pcwuw",
230 "v2powpr", "v2powpw", "v2powur", "v2powuw",
231 "id_mmfr0","actlr", "pmcr", "pmcntr",
231 "id_mmfr0", "actlr", "pmcr", "pmccntr",
232 "pmcntenset", "pmcntenclr", "pmovsr",
233 "pmswinc", "pmselr", "pmceid0",
234 "pmceid1", "pmc_other", "pmxevcntr",
235 "pmuserenr", "pmintenset", "pmintenclr",
236 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
237 // Unimplemented below
238 "tcmtr",
239 "id_pfr1", "id_dfr0", "id_afr0",
240 "id_mmfr1", "id_mmfr2", "id_mmfr3",
241 "aidr", "adfsr", "aifsr",
242 "dcimvac", "dcisw", "mccsw",
243 "dccmvau",
244 "nsacr",
232 "pmcntenset", "pmcntenclr", "pmovsr",
233 "pmswinc", "pmselr", "pmceid0",
234 "pmceid1", "pmc_other", "pmxevcntr",
235 "pmuserenr", "pmintenset", "pmintenclr",
236 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
237 // Unimplemented below
238 "tcmtr",
239 "id_pfr1", "id_dfr0", "id_afr0",
240 "id_mmfr1", "id_mmfr2", "id_mmfr3",
241 "aidr", "adfsr", "aifsr",
242 "dcimvac", "dcisw", "mccsw",
243 "dccmvau",
244 "nsacr",
245 "vbar", "mvbar", "isr", "fceidr",
245 "vbar", "mvbar", "isr", "fceidr", "l2latency",
246 "nop", "raz"
247 };
248
249 BitUnion32(CPSR)
250 Bitfield<31> n;
251 Bitfield<30> z;
252 Bitfield<29> c;
253 Bitfield<28> v;

--- 193 unchanged lines hidden --- 		246 "nop", "raz"
247 };
248
249 BitUnion32(CPSR)
250 Bitfield<31> n;
251 Bitfield<30> z;
252 Bitfield<29> c;
253 Bitfield<28> v;

--- 193 unchanged lines hidden ---