miscregs.hh (7287:25c1718b819a) miscregs.hh (7297:2b127f2655d6)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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95 MISCREG_CPACR,
96 MISCREG_CLIDR,
97 MISCREG_CCSIDR,
98 MISCREG_CSSELR,
99 MISCREG_ICIALLUIS,
100 MISCREG_ICIALLU,
101 MISCREG_ICIMVAU,
102 MISCREG_BPIMVA,
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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95 MISCREG_CPACR,
96 MISCREG_CLIDR,
97 MISCREG_CCSIDR,
98 MISCREG_CSSELR,
99 MISCREG_ICIALLUIS,
100 MISCREG_ICIALLU,
101 MISCREG_ICIMVAU,
102 MISCREG_BPIMVA,
103 MISCREG_BPIALLIS,
104 MISCREG_BPIALL,
103 MISCREG_CP15_UNIMP_START,
104 MISCREG_CTR = MISCREG_CP15_UNIMP_START,
105 MISCREG_TCMTR,
106 MISCREG_MPUIR,
107 MISCREG_MPIDR,
108 MISCREG_MIDR,
109 MISCREG_ID_PFR0,
110 MISCREG_ID_PFR1,

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130 MISCREG_IFAR,
131 MISCREG_DRBAR,
132 MISCREG_IRBAR,
133 MISCREG_DRSR,
134 MISCREG_IRSR,
135 MISCREG_DRACR,
136 MISCREG_IRACR,
137 MISCREG_RGNR,
105 MISCREG_CP15_UNIMP_START,
106 MISCREG_CTR = MISCREG_CP15_UNIMP_START,
107 MISCREG_TCMTR,
108 MISCREG_MPUIR,
109 MISCREG_MPIDR,
110 MISCREG_MIDR,
111 MISCREG_ID_PFR0,
112 MISCREG_ID_PFR1,

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132 MISCREG_IFAR,
133 MISCREG_DRBAR,
134 MISCREG_IRBAR,
135 MISCREG_DRSR,
136 MISCREG_IRSR,
137 MISCREG_DRACR,
138 MISCREG_IRACR,
139 MISCREG_RGNR,
138 MISCREG_BPIALLIS,
139 MISCREG_BPIALL,
140 MISCREG_DCIMVAC,
141 MISCREG_DCISW,
142 MISCREG_MCCSW,
143 MISCREG_DCCMVAU,
144
145 MISCREG_CP15_END,
146
147 // Dummy indices

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157 const char * const miscRegName[NUM_MISCREGS] = {
158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc",
159 "spsr_mon", "spsr_und", "spsr_abt",
160 "fpsr", "fpsid", "fpscr", "fpexc",
161 "sctlr", "dccisw", "dccimvac", "dccmvac",
162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw",
163 "cp15isb", "cp15dsb", "cp15dmb", "cpacr",
164 "clidr", "ccsidr", "csselr",
140 MISCREG_DCIMVAC,
141 MISCREG_DCISW,
142 MISCREG_MCCSW,
143 MISCREG_DCCMVAU,
144
145 MISCREG_CP15_END,
146
147 // Dummy indices

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157 const char * const miscRegName[NUM_MISCREGS] = {
158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc",
159 "spsr_mon", "spsr_und", "spsr_abt",
160 "fpsr", "fpsid", "fpscr", "fpexc",
161 "sctlr", "dccisw", "dccimvac", "dccmvac",
162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw",
163 "cp15isb", "cp15dsb", "cp15dmb", "cpacr",
164 "clidr", "ccsidr", "csselr",
165 "icialluis", "iciallu", "icimvau", "bpimva",
165 "icialluis", "iciallu", "icimvau",
166 "bpimva", "bpiallis", "bpiall",
166 "ctr", "tcmtr", "mpuir", "mpidr", "midr",
167 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
168 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
169 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
170 "aidr", "actlr",
171 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
172 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr",
167 "ctr", "tcmtr", "mpuir", "mpidr", "midr",
168 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
169 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
170 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
171 "aidr", "actlr",
172 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
173 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr",
173 "rgnr", "bpiallis",
174 "bpiall", "dcimvac", "dcisw", "mccsw",
174 "rgnr",
175 "dcimvac", "dcisw", "mccsw",
175 "dccmvau",
176 "nop", "raz"
177 };
178
179 BitUnion32(CPSR)
180 Bitfield<31> n;
181 Bitfield<30> z;
182 Bitfield<29> c;

--- 52 unchanged lines hidden --- 		176 "dccmvau",
177 "nop", "raz"
178 };
179
180 BitUnion32(CPSR)
181 Bitfield<31> n;
182 Bitfield<30> z;
183 Bitfield<29> c;

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