miscregs.hh (7275:d1202f99eb3e) miscregs.hh (7276:8444b49bd88d)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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90 MISCREG_TPIDRPRW,
91 MISCREG_CP15ISB,
92 MISCREG_CP15DSB,
93 MISCREG_CP15DMB,
94 MISCREG_CPACR,
95 MISCREG_CLIDR,
96 MISCREG_ICIALLUIS,
97 MISCREG_ICIALLU,
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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90 MISCREG_TPIDRPRW,
91 MISCREG_CP15ISB,
92 MISCREG_CP15DSB,
93 MISCREG_CP15DMB,
94 MISCREG_CPACR,
95 MISCREG_CLIDR,
96 MISCREG_ICIALLUIS,
97 MISCREG_ICIALLU,
98 MISCREG_ICIMVAU,
98 MISCREG_CP15_UNIMP_START,
99 MISCREG_CTR = MISCREG_CP15_UNIMP_START,
100 MISCREG_TCMTR,
101 MISCREG_MPUIR,
102 MISCREG_MPIDR,
103 MISCREG_MIDR,
104 MISCREG_ID_PFR0,
105 MISCREG_ID_PFR1,

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128 MISCREG_DRBAR,
129 MISCREG_IRBAR,
130 MISCREG_DRSR,
131 MISCREG_IRSR,
132 MISCREG_DRACR,
133 MISCREG_IRACR,
134 MISCREG_RGNR,
135 MISCREG_BPIALLIS,
99 MISCREG_CP15_UNIMP_START,
100 MISCREG_CTR = MISCREG_CP15_UNIMP_START,
101 MISCREG_TCMTR,
102 MISCREG_MPUIR,
103 MISCREG_MPIDR,
104 MISCREG_MIDR,
105 MISCREG_ID_PFR0,
106 MISCREG_ID_PFR1,

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129 MISCREG_DRBAR,
130 MISCREG_IRBAR,
131 MISCREG_DRSR,
132 MISCREG_IRSR,
133 MISCREG_DRACR,
134 MISCREG_IRACR,
135 MISCREG_RGNR,
136 MISCREG_BPIALLIS,
136 MISCREG_ICIMVAU,
137 MISCREG_BPIALL,
138 MISCREG_BPIMVA,
139 MISCREG_DCIMVAC,
140 MISCREG_DCISW,
141 MISCREG_DCCMVAC,
142 MISCREG_MCCSW,
143 MISCREG_DCCMVAU,
144

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156
157 const char * const miscRegName[NUM_MISCREGS] = {
158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc",
159 "spsr_mon", "spsr_und", "spsr_abt",
160 "fpsr", "fpsid", "fpscr", "fpexc",
161 "sctlr", "dccisw", "dccimvac",
162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw",
163 "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr",
137 MISCREG_BPIALL,
138 MISCREG_BPIMVA,
139 MISCREG_DCIMVAC,
140 MISCREG_DCISW,
141 MISCREG_DCCMVAC,
142 MISCREG_MCCSW,
143 MISCREG_DCCMVAU,
144

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156
157 const char * const miscRegName[NUM_MISCREGS] = {
158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc",
159 "spsr_mon", "spsr_und", "spsr_abt",
160 "fpsr", "fpsid", "fpscr", "fpexc",
161 "sctlr", "dccisw", "dccimvac",
162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw",
163 "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr",
164 "icialluis", "iciallu",
164 "icialluis", "iciallu", "icimvau",
165 "ctr", "tcmtr", "mpuir", "mpidr", "midr",
166 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
167 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
168 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
169 "ccsidr", "aidr", "csselr", "actlr",
170 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
171 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr",
165 "ctr", "tcmtr", "mpuir", "mpidr", "midr",
166 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
167 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
168 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
169 "ccsidr", "aidr", "csselr", "actlr",
170 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
171 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr",
172 "rgnr", "bpiallis", "icimvau",
172 "rgnr", "bpiallis",
173 "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw",
174 "dccmvau",
175 "nop", "raz"
176 };
177
178 BitUnion32(CPSR)
179 Bitfield<31> n;
180 Bitfield<30> z;

--- 53 unchanged lines hidden --- 		173 "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw",
174 "dccmvau",
175 "nop", "raz"
176 };
177
178 BitUnion32(CPSR)
179 Bitfield<31> n;
180 Bitfield<30> z;

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