miscregs.hh (7273:674fc83d1908) | miscregs.hh (7274:b299cce14211) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 79 unchanged lines hidden (view full) --- 88 MISCREG_TPIDRURW, 89 MISCREG_TPIDRURO, 90 MISCREG_TPIDRPRW, 91 MISCREG_CP15ISB, 92 MISCREG_CP15DSB, 93 MISCREG_CP15DMB, 94 MISCREG_CPACR, 95 MISCREG_CLIDR, | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 79 unchanged lines hidden (view full) --- 88 MISCREG_TPIDRURW, 89 MISCREG_TPIDRURO, 90 MISCREG_TPIDRPRW, 91 MISCREG_CP15ISB, 92 MISCREG_CP15DSB, 93 MISCREG_CP15DMB, 94 MISCREG_CPACR, 95 MISCREG_CLIDR, |
96 MISCREG_ICIALLUIS, |
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96 MISCREG_CP15_UNIMP_START, 97 MISCREG_CTR = MISCREG_CP15_UNIMP_START, 98 MISCREG_TCMTR, 99 MISCREG_MPUIR, 100 MISCREG_MPIDR, 101 MISCREG_MIDR, 102 MISCREG_ID_PFR0, 103 MISCREG_ID_PFR1, --- 21 unchanged lines hidden (view full) --- 125 MISCREG_IFAR, 126 MISCREG_DRBAR, 127 MISCREG_IRBAR, 128 MISCREG_DRSR, 129 MISCREG_IRSR, 130 MISCREG_DRACR, 131 MISCREG_IRACR, 132 MISCREG_RGNR, | 97 MISCREG_CP15_UNIMP_START, 98 MISCREG_CTR = MISCREG_CP15_UNIMP_START, 99 MISCREG_TCMTR, 100 MISCREG_MPUIR, 101 MISCREG_MPIDR, 102 MISCREG_MIDR, 103 MISCREG_ID_PFR0, 104 MISCREG_ID_PFR1, --- 21 unchanged lines hidden (view full) --- 126 MISCREG_IFAR, 127 MISCREG_DRBAR, 128 MISCREG_IRBAR, 129 MISCREG_DRSR, 130 MISCREG_IRSR, 131 MISCREG_DRACR, 132 MISCREG_IRACR, 133 MISCREG_RGNR, |
133 MISCREG_ICIALLUIS, | |
134 MISCREG_BPIALLIS, 135 MISCREG_ICIALLU, 136 MISCREG_ICIMVAU, 137 MISCREG_BPIALL, 138 MISCREG_BPIMVA, 139 MISCREG_DCIMVAC, 140 MISCREG_DCISW, 141 MISCREG_DCCMVAC, --- 13 unchanged lines hidden (view full) --- 155 unsigned crm, unsigned opc2); 156 157 const char * const miscRegName[NUM_MISCREGS] = { 158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc", 159 "spsr_mon", "spsr_und", "spsr_abt", 160 "fpsr", "fpsid", "fpscr", "fpexc", 161 "sctlr", "dccisw", "dccimvac", 162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw", | 134 MISCREG_BPIALLIS, 135 MISCREG_ICIALLU, 136 MISCREG_ICIMVAU, 137 MISCREG_BPIALL, 138 MISCREG_BPIMVA, 139 MISCREG_DCIMVAC, 140 MISCREG_DCISW, 141 MISCREG_DCCMVAC, --- 13 unchanged lines hidden (view full) --- 155 unsigned crm, unsigned opc2); 156 157 const char * const miscRegName[NUM_MISCREGS] = { 158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc", 159 "spsr_mon", "spsr_und", "spsr_abt", 160 "fpsr", "fpsid", "fpscr", "fpexc", 161 "sctlr", "dccisw", "dccimvac", 162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw", |
163 "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", | 163 "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", "icialluis", |
164 "ctr", "tcmtr", "mpuir", "mpidr", "midr", 165 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0", 166 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3", 167 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5", 168 "ccsidr", "aidr", "csselr", "actlr", 169 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar", 170 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr", | 164 "ctr", "tcmtr", "mpuir", "mpidr", "midr", 165 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0", 166 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3", 167 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5", 168 "ccsidr", "aidr", "csselr", "actlr", 169 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar", 170 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr", |
171 "rgnr", "icialluis", "bpiallis", "iciallu", "icimvau", | 171 "rgnr", "bpiallis", "iciallu", "icimvau", |
172 "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw", 173 "dccmvau", 174 "nop", "raz" 175 }; 176 177 BitUnion32(CPSR) 178 Bitfield<31> n; 179 Bitfield<30> z; --- 53 unchanged lines hidden --- | 172 "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw", 173 "dccmvau", 174 "nop", "raz" 175 }; 176 177 BitUnion32(CPSR) 178 Bitfield<31> n; 179 Bitfield<30> z; --- 53 unchanged lines hidden --- |