miscregs.hh (7271:c1f84426708a) miscregs.hh (7272:105f6d3e1099)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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84 MISCREG_SCTLR = MISCREG_CP15_START,
85 MISCREG_DCCISW,
86 MISCREG_DCCIMVAC,
87 MISCREG_CONTEXTIDR,
88 MISCREG_TPIDRURW,
89 MISCREG_TPIDRURO,
90 MISCREG_TPIDRPRW,
91 MISCREG_CP15ISB,
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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84 MISCREG_SCTLR = MISCREG_CP15_START,
85 MISCREG_DCCISW,
86 MISCREG_DCCIMVAC,
87 MISCREG_CONTEXTIDR,
88 MISCREG_TPIDRURW,
89 MISCREG_TPIDRURO,
90 MISCREG_TPIDRPRW,
91 MISCREG_CP15ISB,
92 MISCREG_CP15DSB,
93 MISCREG_CP15DMB,
92 MISCREG_CPACR,
93 MISCREG_CP15_UNIMP_START,
94 MISCREG_CTR = MISCREG_CP15_UNIMP_START,
95 MISCREG_TCMTR,
96 MISCREG_MPUIR,
97 MISCREG_MPIDR,
98 MISCREG_MIDR,
99 MISCREG_ID_PFR0,

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133 MISCREG_ICIALLU,
134 MISCREG_ICIMVAU,
135 MISCREG_BPIALL,
136 MISCREG_BPIMVA,
137 MISCREG_DCIMVAC,
138 MISCREG_DCISW,
139 MISCREG_DCCMVAC,
140 MISCREG_MCCSW,
94 MISCREG_CPACR,
95 MISCREG_CP15_UNIMP_START,
96 MISCREG_CTR = MISCREG_CP15_UNIMP_START,
97 MISCREG_TCMTR,
98 MISCREG_MPUIR,
99 MISCREG_MPIDR,
100 MISCREG_MIDR,
101 MISCREG_ID_PFR0,

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135 MISCREG_ICIALLU,
136 MISCREG_ICIMVAU,
137 MISCREG_BPIALL,
138 MISCREG_BPIMVA,
139 MISCREG_DCIMVAC,
140 MISCREG_DCISW,
141 MISCREG_DCCMVAC,
142 MISCREG_MCCSW,
141 MISCREG_CP15DSB,
142 MISCREG_CP15DMB,
143 MISCREG_DCCMVAU,
144
145 MISCREG_CP15_END,
146
147 // Dummy indices
148 MISCREG_NOP = MISCREG_CP15_END,
149 MISCREG_RAZ,
150

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155 unsigned crm, unsigned opc2);
156
157 const char * const miscRegName[NUM_MISCREGS] = {
158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc",
159 "spsr_mon", "spsr_und", "spsr_abt",
160 "fpsr", "fpsid", "fpscr", "fpexc",
161 "sctlr", "dccisw", "dccimvac",
162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw",
143 MISCREG_DCCMVAU,
144
145 MISCREG_CP15_END,
146
147 // Dummy indices
148 MISCREG_NOP = MISCREG_CP15_END,
149 MISCREG_RAZ,
150

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155 unsigned crm, unsigned opc2);
156
157 const char * const miscRegName[NUM_MISCREGS] = {
158 "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc",
159 "spsr_mon", "spsr_und", "spsr_abt",
160 "fpsr", "fpsid", "fpscr", "fpexc",
161 "sctlr", "dccisw", "dccimvac",
162 "contextidr", "tpidrurw", "tpidruro", "tpidrprw",
163 "cp15isb", "cpacr", "ctr", "tcmtr", "mpuir", "mpidr", "midr",
163 "cp15isb", "cp15dsb", "cp15dmb", "cpacr",
164 "ctr", "tcmtr", "mpuir", "mpidr", "midr",
164 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
165 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
166 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
167 "ccsidr", "clidr", "aidr", "csselr", "actlr",
168 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
169 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr",
170 "rgnr", "icialluis", "bpiallis", "iciallu", "icimvau",
171 "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw",
165 "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
166 "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
167 "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
168 "ccsidr", "clidr", "aidr", "csselr", "actlr",
169 "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
170 "drbar", "irbar", "drsr", "irsr", "dracr", "iracr",
171 "rgnr", "icialluis", "bpiallis", "iciallu", "icimvau",
172 "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw",
172 "cp15dsb", "cp15dmb", "dccmvau",
173 "dccmvau",
173 "nop", "raz"
174 };
175
176 BitUnion32(CPSR)
177 Bitfield<31> n;
178 Bitfield<30> z;
179 Bitfield<29> c;
180 Bitfield<28> v;

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175 };
176
177 BitUnion32(CPSR)
178 Bitfield<31> n;
179 Bitfield<30> z;
180 Bitfield<29> c;
181 Bitfield<28> v;

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