miscregs.hh (14128:6ed23d07d0d1) | miscregs.hh (14242:076b215de8d4) |
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1/* 2 * Copyright (c) 2010-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 935 unchanged lines hidden (view full) --- 944 MISCREG_WARN_NOT_FAIL, // If MISCREG_IMPLEMENTED is deasserted, it 945 // tells whether the instruction should raise a 946 // warning or fail 947 MISCREG_MUTEX, // True if the register corresponds to a pair of 948 // mutually exclusive registers 949 MISCREG_BANKED, // True if the register is banked between the two 950 // security states, and this is the parent node of the 951 // two banked registers | 1/* 2 * Copyright (c) 2010-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 935 unchanged lines hidden (view full) --- 944 MISCREG_WARN_NOT_FAIL, // If MISCREG_IMPLEMENTED is deasserted, it 945 // tells whether the instruction should raise a 946 // warning or fail 947 MISCREG_MUTEX, // True if the register corresponds to a pair of 948 // mutually exclusive registers 949 MISCREG_BANKED, // True if the register is banked between the two 950 // security states, and this is the parent node of the 951 // two banked registers |
952 MISCREG_BANKED64, // True if the register is banked between the two 953 // security states, and this is the parent node of 954 // the two banked registers. Used in AA64 only. |
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952 MISCREG_BANKED_CHILD, // The entry is one of the child registers that 953 // forms a banked set of regs (along with the 954 // other child regs) 955 956 // Access permissions 957 // User mode 958 MISCREG_USR_NS_RD, 959 MISCREG_USR_NS_WR, --- 976 unchanged lines hidden (view full) --- 1936 1937 // Flattens a misc reg index using the specified security state. This is 1938 // used for opperations (eg address translations) where the security 1939 // state of the register access may differ from the current state of the 1940 // processor 1941 int 1942 snsBankedIndex(MiscRegIndex reg, ThreadContext *tc, bool ns); 1943 | 955 MISCREG_BANKED_CHILD, // The entry is one of the child registers that 956 // forms a banked set of regs (along with the 957 // other child regs) 958 959 // Access permissions 960 // User mode 961 MISCREG_USR_NS_RD, 962 MISCREG_USR_NS_WR, --- 976 unchanged lines hidden (view full) --- 1939 1940 // Flattens a misc reg index using the specified security state. This is 1941 // used for opperations (eg address translations) where the security 1942 // state of the register access may differ from the current state of the 1943 // processor 1944 int 1945 snsBankedIndex(MiscRegIndex reg, ThreadContext *tc, bool ns); 1946 |
1947 int 1948 snsBankedIndex64(MiscRegIndex reg, ThreadContext *tc); 1949 |
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1944 // Takes a misc reg index and returns the root reg if its one of a set of 1945 // banked registers 1946 void 1947 preUnflattenMiscReg(); 1948 1949 int 1950 unflattenMiscReg(int reg); 1951 1952} 1953 1954#endif // __ARCH_ARM_MISCREGS_HH__ | 1950 // Takes a misc reg index and returns the root reg if its one of a set of 1951 // banked registers 1952 void 1953 preUnflattenMiscReg(); 1954 1955 int 1956 unflattenMiscReg(int reg); 1957 1958} 1959 1960#endif // __ARCH_ARM_MISCREGS_HH__ |