miscregs.hh (13759:9941fca869a9) miscregs.hh (14128:6ed23d07d0d1)
1/*
1/*
2 * Copyright (c) 2010-2018 ARM Limited
2 * Copyright (c) 2010-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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925 MISCREG_ERXSTATUS_EL1,
926 MISCREG_ERXADDR_EL1,
927 MISCREG_ERXMISC0_EL1,
928 MISCREG_ERXMISC1_EL1,
929 MISCREG_DISR_EL1,
930 MISCREG_VSESR_EL2,
931 MISCREG_VDISR_EL2,
932
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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925 MISCREG_ERXSTATUS_EL1,
926 MISCREG_ERXADDR_EL1,
927 MISCREG_ERXMISC0_EL1,
928 MISCREG_ERXMISC1_EL1,
929 MISCREG_DISR_EL1,
930 MISCREG_VSESR_EL2,
931 MISCREG_VDISR_EL2,
932
933 // PSTATE
934 MISCREG_PAN,
935
933 // Total number of Misc Registers: Physical + Dummy
934 NUM_MISCREGS
935 };
936
937 enum MiscRegInfo {
938 MISCREG_IMPLEMENTED,
939 MISCREG_UNVERIFIABLE, // Does the value change on every read (e.g. a
940 // arch generic counter)

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1849 "erxctlr_el1",
1850 "erxstatus_el1",
1851 "erxaddr_el1",
1852 "erxmisc0_el1",
1853 "erxmisc1_el1",
1854 "disr_el1",
1855 "vsesr_el2",
1856 "vdisr_el2",
936 // Total number of Misc Registers: Physical + Dummy
937 NUM_MISCREGS
938 };
939
940 enum MiscRegInfo {
941 MISCREG_IMPLEMENTED,
942 MISCREG_UNVERIFIABLE, // Does the value change on every read (e.g. a
943 // arch generic counter)

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1852 "erxctlr_el1",
1853 "erxstatus_el1",
1854 "erxaddr_el1",
1855 "erxmisc0_el1",
1856 "erxmisc1_el1",
1857 "disr_el1",
1858 "vsesr_el2",
1859 "vdisr_el2",
1860
1861 // PSTATE
1862 "pan",
1857 };
1858
1859 static_assert(sizeof(miscRegName) / sizeof(*miscRegName) == NUM_MISCREGS,
1860 "The miscRegName array and NUM_MISCREGS are inconsistent.");
1861
1862 // This mask selects bits of the CPSR that actually go in the CondCodes
1863 // integer register to allow renaming.
1864 static const uint32_t CondCodesMask = 0xF00F0000;

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1864
1865 static_assert(sizeof(miscRegName) / sizeof(*miscRegName) == NUM_MISCREGS,
1866 "The miscRegName array and NUM_MISCREGS are inconsistent.");
1867
1868 // This mask selects bits of the CPSR that actually go in the CondCodes
1869 // integer register to allow renaming.
1870 static const uint32_t CondCodesMask = 0xF00F0000;

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