miscregs.hh (12816:9e9bd9e6e206) miscregs.hh (13019:3fa5ab820fa8)
1/*
2 * Copyright (c) 2010-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1796 unchanged lines hidden (view full) ---

1805 Bitfield<3, 0> t0sz;
1806 Bitfield<4> s;
1807 Bitfield<5, 0> t0sz64;
1808 Bitfield<7, 6> sl0;
1809 Bitfield<9, 8> irgn0;
1810 Bitfield<11, 10> orgn0;
1811 Bitfield<13, 12> sh0;
1812 Bitfield<15, 14> tg0;
1/*
2 * Copyright (c) 2010-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1796 unchanged lines hidden (view full) ---

1805 Bitfield<3, 0> t0sz;
1806 Bitfield<4> s;
1807 Bitfield<5, 0> t0sz64;
1808 Bitfield<7, 6> sl0;
1809 Bitfield<9, 8> irgn0;
1810 Bitfield<11, 10> orgn0;
1811 Bitfield<13, 12> sh0;
1812 Bitfield<15, 14> tg0;
1813 Bitfield<18, 16> ps; // Only defined for VTCR_EL2
1813 EndBitUnion(VTCR_t)
1814
1815 BitUnion32(PRRR)
1816 Bitfield<1,0> tr0;
1817 Bitfield<3,2> tr1;
1818 Bitfield<5,4> tr2;
1819 Bitfield<7,6> tr3;
1820 Bitfield<9,8> tr4;

--- 161 unchanged lines hidden --- 		1814 EndBitUnion(VTCR_t)
1815
1816 BitUnion32(PRRR)
1817 Bitfield<1,0> tr0;
1818 Bitfield<3,2> tr1;
1819 Bitfield<5,4> tr2;
1820 Bitfield<7,6> tr3;
1821 Bitfield<9,8> tr4;

--- 161 unchanged lines hidden ---