miscregs.hh (10421:d469fdcd937e) miscregs.hh (10506:aa23216161fa)
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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672 MISCREG_A64_UNIMPL, // 603
673 MISCREG_UNKNOWN, // 604
674
675 NUM_MISCREGS // 605
676 };
677
678 enum MiscRegInfo {
679 MISCREG_IMPLEMENTED,
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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672 MISCREG_A64_UNIMPL, // 603
673 MISCREG_UNKNOWN, // 604
674
675 NUM_MISCREGS // 605
676 };
677
678 enum MiscRegInfo {
679 MISCREG_IMPLEMENTED,
680 MISCREG_UNVERIFIABLE, // Does the value change on every read (e.g. a
681 // arch generic counter)
680 MISCREG_WARN_NOT_FAIL, // If MISCREG_IMPLEMENTED is deasserted, it
681 // tells whether the instruction should raise a
682 // warning or fail
683 MISCREG_MUTEX, // True if the register corresponds to a pair of
684 // mutually exclusive registers
685 MISCREG_BANKED, // True if the register is banked between the two
686 // security states, and this is the parent node of the
687 // two banked registers

--- 1194 unchanged lines hidden --- 		682 MISCREG_WARN_NOT_FAIL, // If MISCREG_IMPLEMENTED is deasserted, it
683 // tells whether the instruction should raise a
684 // warning or fail
685 MISCREG_MUTEX, // True if the register corresponds to a pair of
686 // mutually exclusive registers
687 MISCREG_BANKED, // True if the register is banked between the two
688 // security states, and this is the parent node of the
689 // two banked registers

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