miscregs.hh (10037:5cac77888310) miscregs.hh (10324:f40134eb3f85)
1/*
1/*
2 * Copyright (c) 2010-2013 ARM Limited
2 * Copyright (c) 2010-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 1699 unchanged lines hidden (view full) ---

1710 Bitfield<38> tbi1;
1711 // Common
1712 Bitfield<31> eae;
1713 // TCR_EL2/3 (AArch64)
1714 Bitfield<18, 16> ps;
1715 Bitfield<20> tbi;
1716 EndBitUnion(TTBCR)
1717
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 1699 unchanged lines hidden (view full) ---

1710 Bitfield<38> tbi1;
1711 // Common
1712 Bitfield<31> eae;
1713 // TCR_EL2/3 (AArch64)
1714 Bitfield<18, 16> ps;
1715 Bitfield<20> tbi;
1716 EndBitUnion(TTBCR)
1717
1718 // Fields of TCR_EL{1,2,3} (mostly overlapping)
1719 // TCR_EL1 is natively 64 bits, the others are 32 bits
1720 BitUnion64(TCR)
1721 Bitfield<5, 0> t0sz;
1722 Bitfield<7> epd0; // EL1
1723 Bitfield<9, 8> irgn0;
1724 Bitfield<11, 10> orgn0;
1725 Bitfield<13, 12> sh0;
1726 Bitfield<15, 14> tg0;
1727 Bitfield<18, 16> ps;
1728 Bitfield<20> tbi; // EL2/EL3
1729 Bitfield<21, 16> t1sz; // EL1
1730 Bitfield<22> a1; // EL1
1731 Bitfield<23> epd1; // EL1
1732 Bitfield<25, 24> irgn1; // EL1
1733 Bitfield<27, 26> orgn1; // EL1
1734 Bitfield<29, 28> sh1; // EL1
1735 Bitfield<31, 30> tg1; // EL1
1736 Bitfield<34, 32> ips; // EL1
1737 Bitfield<36> as; // EL1
1738 Bitfield<37> tbi0; // EL1
1739 Bitfield<38> tbi1; // EL1
1740 EndBitUnion(TCR)
1741
1718 BitUnion32(HTCR)
1719 Bitfield<2, 0> t0sz;
1720 Bitfield<9, 8> irgn0;
1721 Bitfield<11, 10> orgn0;
1722 Bitfield<13, 12> sh0;
1723 EndBitUnion(HTCR)
1724
1725 BitUnion32(VTCR_t)

--- 151 unchanged lines hidden --- 		1742 BitUnion32(HTCR)
1743 Bitfield<2, 0> t0sz;
1744 Bitfield<9, 8> irgn0;
1745 Bitfield<11, 10> orgn0;
1746 Bitfield<13, 12> sh0;
1747 EndBitUnion(HTCR)
1748
1749 BitUnion32(VTCR_t)

--- 151 unchanged lines hidden ---