1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 182 unchanged lines hidden (view full) --- 191 MISCREG_MCCSW, 192 MISCREG_DCCMVAU, 193 MISCREG_NSACR, 194 MISCREG_VBAR, 195 MISCREG_MVBAR, 196 MISCREG_ISR, 197 MISCREG_FCEIDR, 198 MISCREG_L2LATENCY, |
199 MISCREG_CRN15, |
200 201 202 MISCREG_CP15_END, 203 204 // Dummy indices 205 MISCREG_NOP = MISCREG_CP15_END, 206 MISCREG_RAZ, 207 --- 37 unchanged lines hidden (view full) --- 245 "tcmtr", 246 "id_dfr0", "id_afr0", 247 "id_mmfr1", 248 "aidr", "adfsr", "aifsr", 249 "dcimvac", "dcisw", "mccsw", 250 "dccmvau", 251 "nsacr", 252 "vbar", "mvbar", "isr", "fceidr", "l2latency", |
253 "crn15", |
254 "nop", "raz" 255 }; 256 257 BitUnion32(CPSR) 258 Bitfield<31,30> nz; 259 Bitfield<29> c; 260 Bitfield<28> v; 261 Bitfield<27> q; --- 197 unchanged lines hidden --- |