1/* 2 * Copyright (c) 2010-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 39 unchanged lines hidden (view full) --- 48#include "base/bitunion.hh" 49#include "base/compiler.hh" 50 51class ThreadContext; 52 53 54namespace ArmISA 55{ |
56 enum MiscRegIndex { 57 MISCREG_CPSR = 0, // 0 58 MISCREG_SPSR, // 1 59 MISCREG_SPSR_FIQ, // 2 60 MISCREG_SPSR_IRQ, // 3 61 MISCREG_SPSR_SVC, // 4 62 MISCREG_SPSR_MON, // 5 63 MISCREG_SPSR_ABT, // 6 --- 1818 unchanged lines hidden --- |