miscregs.hh (6735:6437ad24a8a0) | miscregs.hh (6750:33ac9df63f3e) |
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1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 79 unchanged lines hidden (view full) --- 88 Bitfield<9> e; 89 Bitfield<8> a; 90 Bitfield<7> i; 91 Bitfield<6> f; 92 Bitfield<5> t; 93 Bitfield<4, 0> mode; 94 EndBitUnion(CPSR) 95 | 1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 79 unchanged lines hidden (view full) --- 88 Bitfield<9> e; 89 Bitfield<8> a; 90 Bitfield<7> i; 91 Bitfield<6> f; 92 Bitfield<5> t; 93 Bitfield<4, 0> mode; 94 EndBitUnion(CPSR) 95 |
96 // This mask selects bits of the CPSR that actually go in the CondCodes 97 // integer register to allow renaming. 98 static const uint32_t CondCodesMask = 0xF80F0000; 99 |
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96 BitUnion32(SCTLR) 97 Bitfield<30> te; // Thumb Exception Enable 98 Bitfield<29> afe; // Access flag enable 99 Bitfield<28> tre; // TEX Remap bit 100 Bitfield<27> nmfi;// Non-maskable fast interrupts enable 101 Bitfield<25> ee; // Exception Endianness bit 102 Bitfield<24> ve; // Interrupt vectors enable 103 Bitfield<23> rao1;// Read as one --- 19 unchanged lines hidden --- | 100 BitUnion32(SCTLR) 101 Bitfield<30> te; // Thumb Exception Enable 102 Bitfield<29> afe; // Access flag enable 103 Bitfield<28> tre; // TEX Remap bit 104 Bitfield<27> nmfi;// Non-maskable fast interrupts enable 105 Bitfield<25> ee; // Exception Endianness bit 106 Bitfield<24> ve; // Interrupt vectors enable 107 Bitfield<23> rao1;// Read as one --- 19 unchanged lines hidden --- |