miscregs.cc (14242:076b215de8d4) | miscregs.cc (14244:6c2e687fe41f) |
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1/* 2 * Copyright (c) 2010-2013, 2015-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 4589 unchanged lines hidden (view full) --- 4598 InitReg(MISCREG_ICC_EOIR1_EL1) 4599 .res0(0xFF000000) // [31:24] 4600 .allPrivileges().exceptUserMode().reads(0) 4601 .mapsTo(MISCREG_ICC_EOIR1); 4602 InitReg(MISCREG_ICC_HPPIR1_EL1) 4603 .allPrivileges().exceptUserMode().writes(0) 4604 .mapsTo(MISCREG_ICC_HPPIR1); 4605 InitReg(MISCREG_ICC_BPR1_EL1) | 1/* 2 * Copyright (c) 2010-2013, 2015-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 4589 unchanged lines hidden (view full) --- 4598 InitReg(MISCREG_ICC_EOIR1_EL1) 4599 .res0(0xFF000000) // [31:24] 4600 .allPrivileges().exceptUserMode().reads(0) 4601 .mapsTo(MISCREG_ICC_EOIR1); 4602 InitReg(MISCREG_ICC_HPPIR1_EL1) 4603 .allPrivileges().exceptUserMode().writes(0) 4604 .mapsTo(MISCREG_ICC_HPPIR1); 4605 InitReg(MISCREG_ICC_BPR1_EL1) |
4606 .banked() | 4606 .banked64() |
4607 .mapsTo(MISCREG_ICC_BPR1); 4608 InitReg(MISCREG_ICC_BPR1_EL1_NS) 4609 .bankedChild() 4610 .res0(0xfffffff8) // [31:3] 4611 .allPrivileges().exceptUserMode() 4612 .mapsTo(MISCREG_ICC_BPR1_NS); 4613 InitReg(MISCREG_ICC_BPR1_EL1_S) 4614 .bankedChild() --- 442 unchanged lines hidden --- | 4607 .mapsTo(MISCREG_ICC_BPR1); 4608 InitReg(MISCREG_ICC_BPR1_EL1_NS) 4609 .bankedChild() 4610 .res0(0xfffffff8) // [31:3] 4611 .allPrivileges().exceptUserMode() 4612 .mapsTo(MISCREG_ICC_BPR1_NS); 4613 InitReg(MISCREG_ICC_BPR1_EL1_S) 4614 .bankedChild() --- 442 unchanged lines hidden --- |