miscregs.cc (12675:f3439303feb4) | miscregs.cc (12690:810dd3bdac8f) |
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1/* 2 * Copyright (c) 2010-2013, 2015-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 3378 unchanged lines hidden (view full) --- 3387 // AArch64 registers (Op0=1,3); 3388 InitReg(MISCREG_MIDR_EL1) 3389 .allPrivileges().exceptUserMode().writes(0); 3390 InitReg(MISCREG_MPIDR_EL1) 3391 .allPrivileges().exceptUserMode().writes(0); 3392 InitReg(MISCREG_REVIDR_EL1) 3393 .allPrivileges().exceptUserMode().writes(0); 3394 InitReg(MISCREG_ID_PFR0_EL1) | 1/* 2 * Copyright (c) 2010-2013, 2015-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 3378 unchanged lines hidden (view full) --- 3387 // AArch64 registers (Op0=1,3); 3388 InitReg(MISCREG_MIDR_EL1) 3389 .allPrivileges().exceptUserMode().writes(0); 3390 InitReg(MISCREG_MPIDR_EL1) 3391 .allPrivileges().exceptUserMode().writes(0); 3392 InitReg(MISCREG_REVIDR_EL1) 3393 .allPrivileges().exceptUserMode().writes(0); 3394 InitReg(MISCREG_ID_PFR0_EL1) |
3395 .allPrivileges().exceptUserMode().writes(0); | 3395 .allPrivileges().exceptUserMode().writes(0) 3396 .mapsTo(MISCREG_ID_PFR0); |
3396 InitReg(MISCREG_ID_PFR1_EL1) | 3397 InitReg(MISCREG_ID_PFR1_EL1) |
3397 .allPrivileges().exceptUserMode().writes(0); | 3398 .allPrivileges().exceptUserMode().writes(0) 3399 .mapsTo(MISCREG_ID_PFR1); |
3398 InitReg(MISCREG_ID_DFR0_EL1) 3399 .allPrivileges().exceptUserMode().writes(0) 3400 .mapsTo(MISCREG_ID_DFR0); 3401 InitReg(MISCREG_ID_AFR0_EL1) | 3400 InitReg(MISCREG_ID_DFR0_EL1) 3401 .allPrivileges().exceptUserMode().writes(0) 3402 .mapsTo(MISCREG_ID_DFR0); 3403 InitReg(MISCREG_ID_AFR0_EL1) |
3402 .allPrivileges().exceptUserMode().writes(0); | 3404 .allPrivileges().exceptUserMode().writes(0) 3405 .mapsTo(MISCREG_ID_AFR0); |
3403 InitReg(MISCREG_ID_MMFR0_EL1) | 3406 InitReg(MISCREG_ID_MMFR0_EL1) |
3404 .allPrivileges().exceptUserMode().writes(0); | 3407 .allPrivileges().exceptUserMode().writes(0) 3408 .mapsTo(MISCREG_ID_MMFR0); |
3405 InitReg(MISCREG_ID_MMFR1_EL1) | 3409 InitReg(MISCREG_ID_MMFR1_EL1) |
3406 .allPrivileges().exceptUserMode().writes(0); | 3410 .allPrivileges().exceptUserMode().writes(0) 3411 .mapsTo(MISCREG_ID_MMFR1); |
3407 InitReg(MISCREG_ID_MMFR2_EL1) | 3412 InitReg(MISCREG_ID_MMFR2_EL1) |
3408 .allPrivileges().exceptUserMode().writes(0); | 3413 .allPrivileges().exceptUserMode().writes(0) 3414 .mapsTo(MISCREG_ID_MMFR2); |
3409 InitReg(MISCREG_ID_MMFR3_EL1) | 3415 InitReg(MISCREG_ID_MMFR3_EL1) |
3410 .allPrivileges().exceptUserMode().writes(0); | 3416 .allPrivileges().exceptUserMode().writes(0) 3417 .mapsTo(MISCREG_ID_MMFR3); |
3411 InitReg(MISCREG_ID_ISAR0_EL1) | 3418 InitReg(MISCREG_ID_ISAR0_EL1) |
3412 .allPrivileges().exceptUserMode().writes(0); | 3419 .allPrivileges().exceptUserMode().writes(0) 3420 .mapsTo(MISCREG_ID_ISAR0); |
3413 InitReg(MISCREG_ID_ISAR1_EL1) | 3421 InitReg(MISCREG_ID_ISAR1_EL1) |
3414 .allPrivileges().exceptUserMode().writes(0); | 3422 .allPrivileges().exceptUserMode().writes(0) 3423 .mapsTo(MISCREG_ID_ISAR1); |
3415 InitReg(MISCREG_ID_ISAR2_EL1) | 3424 InitReg(MISCREG_ID_ISAR2_EL1) |
3416 .allPrivileges().exceptUserMode().writes(0); | 3425 .allPrivileges().exceptUserMode().writes(0) 3426 .mapsTo(MISCREG_ID_ISAR2); |
3417 InitReg(MISCREG_ID_ISAR3_EL1) | 3427 InitReg(MISCREG_ID_ISAR3_EL1) |
3418 .allPrivileges().exceptUserMode().writes(0); | 3428 .allPrivileges().exceptUserMode().writes(0) 3429 .mapsTo(MISCREG_ID_ISAR3); |
3419 InitReg(MISCREG_ID_ISAR4_EL1) | 3430 InitReg(MISCREG_ID_ISAR4_EL1) |
3420 .allPrivileges().exceptUserMode().writes(0); | 3431 .allPrivileges().exceptUserMode().writes(0) 3432 .mapsTo(MISCREG_ID_ISAR4); |
3421 InitReg(MISCREG_ID_ISAR5_EL1) | 3433 InitReg(MISCREG_ID_ISAR5_EL1) |
3422 .allPrivileges().exceptUserMode().writes(0); | 3434 .allPrivileges().exceptUserMode().writes(0) 3435 .mapsTo(MISCREG_ID_ISAR5); |
3423 InitReg(MISCREG_MVFR0_EL1) 3424 .allPrivileges().exceptUserMode().writes(0); 3425 InitReg(MISCREG_MVFR1_EL1) 3426 .allPrivileges().exceptUserMode().writes(0); 3427 InitReg(MISCREG_MVFR2_EL1) 3428 .allPrivileges().exceptUserMode().writes(0); 3429 InitReg(MISCREG_ID_AA64PFR0_EL1) 3430 .allPrivileges().exceptUserMode().writes(0); --- 580 unchanged lines hidden --- | 3436 InitReg(MISCREG_MVFR0_EL1) 3437 .allPrivileges().exceptUserMode().writes(0); 3438 InitReg(MISCREG_MVFR1_EL1) 3439 .allPrivileges().exceptUserMode().writes(0); 3440 InitReg(MISCREG_MVFR2_EL1) 3441 .allPrivileges().exceptUserMode().writes(0); 3442 InitReg(MISCREG_ID_AA64PFR0_EL1) 3443 .allPrivileges().exceptUserMode().writes(0); --- 580 unchanged lines hidden --- |