1/*
2 * Copyright (c) 2010-2013, 2015-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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2077 switch (op2) {
2078 case 2:
2079 return MISCREG_L2CTLR_EL1;
2080 case 3:
2081 return MISCREG_L2ECTLR_EL1;
2082 }
2083 break;
2084 }
2085 break;
2086 }
2087 break;
2088 case 12:
2089 switch (op1) {
2090 case 0:
2091 switch (crm) {
2092 case 0:
2093 switch (op2) {
2094 case 0:
2095 return MISCREG_VBAR_EL1;

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2365 case 0:
2366 return MISCREG_CBAR_EL1;
2367
2368 }
2369 break;
2370 }
2371 break;
2372 }
2373 break;
2374 }
2375 break;
2376 }
2377
2378 return MISCREG_UNKNOWN;
2379}
2380
2381bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS]; // initialized below

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