locked_mem.hh (9383:55fa95053ee8) locked_mem.hh (10030:b531e328342d)
1/*
1/*
2 * Copyright (c) 2012 ARM Limited
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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61template <class XC>
62inline void
63handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask)
64{
65 if (!xc->readMiscReg(MISCREG_LOCKFLAG))
66 return;
67
68 Addr locked_addr = xc->readMiscReg(MISCREG_LOCKADDR) & cacheBlockMask;
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 50 unchanged lines hidden (view full) ---

61template <class XC>
62inline void
63handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask)
64{
65 if (!xc->readMiscReg(MISCREG_LOCKFLAG))
66 return;
67
68 Addr locked_addr = xc->readMiscReg(MISCREG_LOCKADDR) & cacheBlockMask;
69 Addr snoop_addr = pkt->getAddr();
69 Addr snoop_addr = pkt->getAddr() & cacheBlockMask;
70
70
71 assert((cacheBlockMask & snoop_addr) == snoop_addr);
72
73 if (locked_addr == snoop_addr)
74 xc->setMiscReg(MISCREG_LOCKFLAG, false);
75}
76
77template <class XC>
78inline void
71 if (locked_addr == snoop_addr)
72 xc->setMiscReg(MISCREG_LOCKFLAG, false);
73}
74
75template <class XC>
76inline void
77handleLockedSnoopHit(XC *xc)
78{
79}
80
81template <class XC>
82inline void
79handleLockedRead(XC *xc, Request *req)
80{
83handleLockedRead(XC *xc, Request *req)
84{
81 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr() & ~0xf);
85 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr());
82 xc->setMiscReg(MISCREG_LOCKFLAG, true);
83}
84
85
86template <class XC>
87inline bool
86 xc->setMiscReg(MISCREG_LOCKFLAG, true);
87}
88
89
90template <class XC>
91inline bool
88handleLockedWrite(XC *xc, Request *req)
92handleLockedWrite(XC *xc, Request *req, Addr cacheBlockMask)
89{
90 if (req->isSwap())
91 return true;
92
93 // Verify that the lock flag is still set and the address
94 // is correct
95 bool lock_flag = xc->readMiscReg(MISCREG_LOCKFLAG);
93{
94 if (req->isSwap())
95 return true;
96
97 // Verify that the lock flag is still set and the address
98 // is correct
99 bool lock_flag = xc->readMiscReg(MISCREG_LOCKFLAG);
96 Addr lock_addr = xc->readMiscReg(MISCREG_LOCKADDR);
97 if (!lock_flag || (req->getPaddr() & ~0xf) != lock_addr) {
100 Addr lock_addr = xc->readMiscReg(MISCREG_LOCKADDR) & cacheBlockMask;
101 if (!lock_flag || (req->getPaddr() & cacheBlockMask) != lock_addr) {
98 // Lock flag not set or addr mismatch in CPU;
99 // don't even bother sending to memory system
100 req->setExtraData(0);
101 xc->setMiscReg(MISCREG_LOCKFLAG, false);
102 // the rest of this code is not architectural;
103 // it's just a debugging aid to help detect
104 // livelock by warning on long sequences of failed
105 // store conditionals

--- 19 unchanged lines hidden --- 		102 // Lock flag not set or addr mismatch in CPU;
103 // don't even bother sending to memory system
104 req->setExtraData(0);
105 xc->setMiscReg(MISCREG_LOCKFLAG, false);
106 // the rest of this code is not architectural;
107 // it's just a debugging aid to help detect
108 // livelock by warning on long sequences of failed
109 // store conditionals

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