locked_mem.hh (8209:9e3f7f00fa90) | locked_mem.hh (8229:78bf55f23338) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2007-2008 The Florida State University 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 29 unchanged lines hidden (view full) --- 38 * @file 39 * 40 * ISA-specific helper functions for locked memory accesses. 41 */ 42 43#include "arch/arm/miscregs.hh" 44#include "mem/request.hh" 45 | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2007-2008 The Florida State University 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 29 unchanged lines hidden (view full) --- 38 * @file 39 * 40 * ISA-specific helper functions for locked memory accesses. 41 */ 42 43#include "arch/arm/miscregs.hh" 44#include "mem/request.hh" 45 |
46 | |
47namespace ArmISA 48{ 49template <class XC> 50inline void 51handleLockedRead(XC *xc, Request *req) 52{ 53 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr() & ~0xf); 54 xc->setMiscReg(MISCREG_LOCKFLAG, true); --- 42 unchanged lines hidden --- | 46namespace ArmISA 47{ 48template <class XC> 49inline void 50handleLockedRead(XC *xc, Request *req) 51{ 52 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr() & ~0xf); 53 xc->setMiscReg(MISCREG_LOCKFLAG, true); --- 42 unchanged lines hidden --- |