gic.cc (10905:a6ca6831e775) gic.cc (11461:294fe30960f0)
1/*
1/*
2 * Copyright (c) 2015 ARM Limited
2 * Copyright (c) 2015-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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39
40#include "arch/arm/kvm/gic.hh"
41
42#include <linux/kvm.h>
43
44#include "debug/Interrupt.hh"
45#include "params/KvmGic.hh"
46
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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39
40#include "arch/arm/kvm/gic.hh"
41
42#include <linux/kvm.h>
43
44#include "debug/Interrupt.hh"
45#include "params/KvmGic.hh"
46
47
48KvmKernelGicV2::KvmKernelGicV2(KvmVM &_vm, Addr cpu_addr, Addr dist_addr)
49 : cpuRange(RangeSize(cpu_addr, KVM_VGIC_V2_CPU_SIZE)),
50 distRange(RangeSize(dist_addr, KVM_VGIC_V2_DIST_SIZE)),
51 vm(_vm),
52 kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2))
53{
54 kdev.setAttr<uint64_t>(
55 KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST, dist_addr);
56 kdev.setAttr<uint64_t>(
57 KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU, cpu_addr);
58}
59
60KvmKernelGicV2::~KvmKernelGicV2()
61{
62}
63
64void
65KvmKernelGicV2::setSPI(unsigned spi)
66{
67 setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, true);
68}
69
70void
71KvmKernelGicV2::clearSPI(unsigned spi)
72{
73 setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, false);
74}
75
76void
77KvmKernelGicV2::setPPI(unsigned vcpu, unsigned ppi)
78{
79 setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, true);
80}
81
82void
83KvmKernelGicV2::clearPPI(unsigned vcpu, unsigned ppi)
84{
85 setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, false);
86}
87
88void
89KvmKernelGicV2::setIntState(unsigned type, unsigned vcpu, unsigned irq,
90 bool high)
91{
92 assert(type <= KVM_ARM_IRQ_TYPE_MASK);
93 assert(vcpu <= KVM_ARM_IRQ_VCPU_MASK);
94 assert(irq <= KVM_ARM_IRQ_NUM_MASK);
95 const uint32_t line(
96 (type << KVM_ARM_IRQ_TYPE_SHIFT) |
97 (vcpu << KVM_ARM_IRQ_VCPU_SHIFT) |
98 (irq << KVM_ARM_IRQ_NUM_SHIFT));
99
100 vm.setIRQLine(line, high);
101}
102
103
47KvmGic::KvmGic(const KvmGicParams *p)
48 : BaseGic(p),
49 system(*p->system),
104KvmGic::KvmGic(const KvmGicParams *p)
105 : BaseGic(p),
106 system(*p->system),
50 vm(*p->kvmVM),
51 kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2)),
52 distRange(RangeSize(p->dist_addr, KVM_VGIC_V2_DIST_SIZE)),
53 cpuRange(RangeSize(p->cpu_addr, KVM_VGIC_V2_CPU_SIZE)),
54 addrRanges{distRange, cpuRange}
107 kernelGic(*p->kvmVM, p->cpu_addr, p->dist_addr),
108 addrRanges{kernelGic.distRange, kernelGic.cpuRange}
55{
109{
56 kdev.setAttr<uint64_t>(
57 KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST,
58 p->dist_addr);
59 kdev.setAttr<uint64_t>(
60 KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU,
61 p->cpu_addr);
62}
63
64KvmGic::~KvmGic()
65{
66}
67
68void
69KvmGic::serialize(CheckpointOut &cp) const

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88{
89 panic("KvmGic: PIO from gem5 is currently unsupported\n");
90}
91
92void
93KvmGic::sendInt(uint32_t num)
94{
95 DPRINTF(Interrupt, "Set SPI %d\n", num);
110}
111
112KvmGic::~KvmGic()
113{
114}
115
116void
117KvmGic::serialize(CheckpointOut &cp) const

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136{
137 panic("KvmGic: PIO from gem5 is currently unsupported\n");
138}
139
140void
141KvmGic::sendInt(uint32_t num)
142{
143 DPRINTF(Interrupt, "Set SPI %d\n", num);
96 setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, num, true);
144 kernelGic.setSPI(num);
97}
98
99void
100KvmGic::clearInt(uint32_t num)
101{
102 DPRINTF(Interrupt, "Clear SPI %d\n", num);
145}
146
147void
148KvmGic::clearInt(uint32_t num)
149{
150 DPRINTF(Interrupt, "Clear SPI %d\n", num);
103 setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, num, false);
151 kernelGic.clearSPI(num);
104}
105
106void
107KvmGic::sendPPInt(uint32_t num, uint32_t cpu)
108{
109 DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num);
152}
153
154void
155KvmGic::sendPPInt(uint32_t num, uint32_t cpu)
156{
157 DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num);
110 setIntState(KVM_ARM_IRQ_TYPE_PPI, cpu, num, true);
158 kernelGic.setPPI(cpu, num);
111}
112
113void
114KvmGic::clearPPInt(uint32_t num, uint32_t cpu)
115{
116 DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num);
159}
160
161void
162KvmGic::clearPPInt(uint32_t num, uint32_t cpu)
163{
164 DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num);
117 setIntState(KVM_ARM_IRQ_TYPE_PPI, cpu, num, false);
165 kernelGic.clearPPI(cpu, num);
118}
119
120void
121KvmGic::verifyMemoryMode() const
122{
123 if (!(system.isAtomicMode() && system.bypassCaches())) {
124 fatal("The in-kernel KVM GIC can only be used with KVM CPUs, but the "
125 "current memory mode does not support KVM.\n");
126 }
127}
128
166}
167
168void
169KvmGic::verifyMemoryMode() const
170{
171 if (!(system.isAtomicMode() && system.bypassCaches())) {
172 fatal("The in-kernel KVM GIC can only be used with KVM CPUs, but the "
173 "current memory mode does not support KVM.\n");
174 }
175}
176
129void
130KvmGic::setIntState(uint8_t type, uint8_t vcpu, uint16_t irq, bool high)
131{
132 assert(type < KVM_ARM_IRQ_TYPE_MASK);
133 assert(vcpu < KVM_ARM_IRQ_VCPU_MASK);
134 assert(irq < KVM_ARM_IRQ_NUM_MASK);
135 const uint32_t line(
136 (type << KVM_ARM_IRQ_TYPE_SHIFT) |
137 (vcpu << KVM_ARM_IRQ_VCPU_SHIFT) |
138 (irq << KVM_ARM_IRQ_NUM_SHIFT));
139
177
140 vm.setIRQLine(line, high);
141}
142
143
144KvmGic *
145KvmGicParams::create()
146{
147 return new KvmGic(this);
148}
178KvmGic *
179KvmGicParams::create()
180{
181 return new KvmGic(this);
182}