base_cpu.cc (10860:cba0f26038b4) base_cpu.cc (11178:555325cbf464)
1/*
2 * Copyright (c) 2012, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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81
82 vm.kvmArmPreferredTarget(target_config);
83 kvmArmVCpuInit(target_config);
84}
85
86Tick
87BaseArmKvmCPU::kvmRun(Tick ticks)
88{
1/*
2 * Copyright (c) 2012, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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81
82 vm.kvmArmPreferredTarget(target_config);
83 kvmArmVCpuInit(target_config);
84}
85
86Tick
87BaseArmKvmCPU::kvmRun(Tick ticks)
88{
89 bool simFIQ(interrupts->checkRaw(INT_FIQ));
90 bool simIRQ(interrupts->checkRaw(INT_IRQ));
89 bool simFIQ(interrupts[0]->checkRaw(INT_FIQ));
90 bool simIRQ(interrupts[0]->checkRaw(INT_IRQ));
91
92 if (fiqAsserted != simFIQ) {
93 fiqAsserted = simFIQ;
94 DPRINTF(KvmInt, "KVM: Update FIQ state: %i\n", simFIQ);
95 vm.setIRQLine(INTERRUPT_VCPU_FIQ(vcpuID), simFIQ);
96 }
97 if (irqAsserted != simIRQ) {
98 irqAsserted = simIRQ;

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92 if (fiqAsserted != simFIQ) {
93 fiqAsserted = simFIQ;
94 DPRINTF(KvmInt, "KVM: Update FIQ state: %i\n", simFIQ);
95 vm.setIRQLine(INTERRUPT_VCPU_FIQ(vcpuID), simFIQ);
96 }
97 if (irqAsserted != simIRQ) {
98 irqAsserted = simIRQ;

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