armv8_cpu.cc (11934:72977e8e15b8) armv8_cpu.cc (12004:acf253787534)
1/*
2 * Copyright (c) 2015, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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218 cpsr.c = tc->readCCReg(CCREG_C);
219 cpsr.v = tc->readCCReg(CCREG_V);
220 if (cpsr.width) {
221 cpsr.ge = tc->readCCReg(CCREG_GE);
222 } else {
223 cpsr.ge = 0;
224 }
225 DPRINTF(KvmContext, " %s := 0x%x\n", "PSTATE", cpsr);
1/*
2 * Copyright (c) 2015, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 209 unchanged lines hidden (view full) ---

218 cpsr.c = tc->readCCReg(CCREG_C);
219 cpsr.v = tc->readCCReg(CCREG_V);
220 if (cpsr.width) {
221 cpsr.ge = tc->readCCReg(CCREG_GE);
222 } else {
223 cpsr.ge = 0;
224 }
225 DPRINTF(KvmContext, " %s := 0x%x\n", "PSTATE", cpsr);
226 setOneReg(INT_REG(regs.pstate), cpsr);
226 setOneReg(INT_REG(regs.pstate), static_cast<uint64_t>(cpsr));
227
228 for (const auto &ri : miscRegMap) {
229 const uint64_t value(tc->readMiscReg(ri.idx));
230 DPRINTF(KvmContext, " %s := 0x%x\n", ri.name, value);
231 setOneReg(ri.kvm, value);
232 }
233
234 for (int i = 0; i < NUM_XREGS; ++i) {

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264}
265
266void
267ArmV8KvmCPU::updateThreadContext()
268{
269 DPRINTF(KvmContext, "In updateThreadContext():\n");
270
271 // Update pstate thread context
227
228 for (const auto &ri : miscRegMap) {
229 const uint64_t value(tc->readMiscReg(ri.idx));
230 DPRINTF(KvmContext, " %s := 0x%x\n", ri.name, value);
231 setOneReg(ri.kvm, value);
232 }
233
234 for (int i = 0; i < NUM_XREGS; ++i) {

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264}
265
266void
267ArmV8KvmCPU::updateThreadContext()
268{
269 DPRINTF(KvmContext, "In updateThreadContext():\n");
270
271 // Update pstate thread context
272 const CPSR cpsr(tc->readMiscRegNoEffect(MISCREG_CPSR));
272 const CPSR cpsr(getOneRegU64(INT_REG(regs.pstate)));
273 DPRINTF(KvmContext, " %s := 0x%x\n", "PSTATE", cpsr);
274 tc->setMiscRegNoEffect(MISCREG_CPSR, cpsr);
275 tc->setCCReg(CCREG_NZ, cpsr.nz);
276 tc->setCCReg(CCREG_C, cpsr.c);
277 tc->setCCReg(CCREG_V, cpsr.v);
278 if (cpsr.width) {
279 tc->setCCReg(CCREG_GE, cpsr.ge);
280 }

--- 99 unchanged lines hidden --- 		273 DPRINTF(KvmContext, " %s := 0x%x\n", "PSTATE", cpsr);
274 tc->setMiscRegNoEffect(MISCREG_CPSR, cpsr);
275 tc->setCCReg(CCREG_NZ, cpsr.nz);
276 tc->setCCReg(CCREG_C, cpsr.c);
277 tc->setCCReg(CCREG_V, cpsr.v);
278 if (cpsr.width) {
279 tc->setCCReg(CCREG_GE, cpsr.ge);
280 }

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