isa_traits.hh (9057:f5ee56466b91) isa_traits.hh (9329:3fe8438cbcfc)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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109 const int HalfwordBytes = 2;
110 const int ByteBytes = 1;
111
112 const uint32_t HighVecs = 0xFFFF0000;
113
114 // Memory accesses cannot be unaligned
115 const bool HasUnalignedMemAcc = true;
116
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 100 unchanged lines hidden (view full) ---

109 const int HalfwordBytes = 2;
110 const int ByteBytes = 1;
111
112 const uint32_t HighVecs = 0xFFFF0000;
113
114 // Memory accesses cannot be unaligned
115 const bool HasUnalignedMemAcc = true;
116
117 const bool CurThreadInfoImplemented = false;
118 const int CurThreadInfoReg = -1;
119
117 enum InterruptTypes
118 {
119 INT_RST,
120 INT_ABT,
121 INT_IRQ,
122 INT_FIQ,
123 INT_SEV, // Special interrupt for recieving SEV's
124 NumInterruptTypes
125 };
126} // namespace ArmISA
127
128using namespace ArmISA;
129
130#endif // __ARCH_ARM_ISA_TRAITS_HH__
120 enum InterruptTypes
121 {
122 INT_RST,
123 INT_ABT,
124 INT_IRQ,
125 INT_FIQ,
126 INT_SEV, // Special interrupt for recieving SEV's
127 NumInterruptTypes
128 };
129} // namespace ArmISA
130
131using namespace ArmISA;
132
133#endif // __ARCH_ARM_ISA_TRAITS_HH__