isa_traits.hh (7720:65d338a8dba4) isa_traits.hh (7799:5d0f62927d75)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 85 unchanged lines hidden (view full) ---

94 inline Addr VAddrVPN(Addr a) { return a >> ArmISA::PageShift; }
95 inline Addr VAddrOffset(Addr a) { return a & ArmISA::PageOffset; }
96
97 const Addr PAddrImplMask = (ULL(1) << PABits) - 1;
98
99 // return a no-op instruction... used for instruction fetch faults
100 const ExtMachInst NoopMachInst = 0x00000000;
101
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 85 unchanged lines hidden (view full) ---

94 inline Addr VAddrVPN(Addr a) { return a >> ArmISA::PageShift; }
95 inline Addr VAddrOffset(Addr a) { return a & ArmISA::PageOffset; }
96
97 const Addr PAddrImplMask = (ULL(1) << PABits) - 1;
98
99 // return a no-op instruction... used for instruction fetch faults
100 const ExtMachInst NoopMachInst = 0x00000000;
101
102 const int LogVMPageSize = 12; // 4K bytes
102 const int LogVMPageSize = 12; // 4K bytes
103 const int VMPageSize = (1 << LogVMPageSize);
104
105 // Shouldn't this be 1 because of Thumb?! Dynamic? --Ali
106 const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
107
108 const int MachineBytes = 4;
109 const int WordBytes = 4;
110 const int HalfwordBytes = 2;

--- 20 unchanged lines hidden --- 		103 const int VMPageSize = (1 << LogVMPageSize);
104
105 // Shouldn't this be 1 because of Thumb?! Dynamic? --Ali
106 const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
107
108 const int MachineBytes = 4;
109 const int WordBytes = 4;
110 const int HalfwordBytes = 2;

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