isa_traits.hh (7349:8b4564729c81) isa_traits.hh (7400:f6c9b27c4dbe)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 96 unchanged lines hidden (view full) ---

105 const Addr PAddrImplMask = (ULL(1) << PABits) - 1;
106
107 // return a no-op instruction... used for instruction fetch faults
108 const ExtMachInst NoopMachInst = 0x00000000;
109
110 const int LogVMPageSize = 12; // 4K bytes
111 const int VMPageSize = (1 << LogVMPageSize);
112
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 96 unchanged lines hidden (view full) ---

105 const Addr PAddrImplMask = (ULL(1) << PABits) - 1;
106
107 // return a no-op instruction... used for instruction fetch faults
108 const ExtMachInst NoopMachInst = 0x00000000;
109
110 const int LogVMPageSize = 12; // 4K bytes
111 const int VMPageSize = (1 << LogVMPageSize);
112
113 // Shouldn't this be 1 because of Thumb?! Dynamic? --Ali
113 const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
114
115 const int MachineBytes = 4;
116 const int WordBytes = 4;
117 const int HalfwordBytes = 2;
118 const int ByteBytes = 1;
119
120 const uint32_t HighVecs = 0xFFFF0000;
121
122 // Memory accesses cannot be unaligned
123 const bool HasUnalignedMemAcc = false;
124
114 const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
115
116 const int MachineBytes = 4;
117 const int WordBytes = 4;
118 const int HalfwordBytes = 2;
119 const int ByteBytes = 1;
120
121 const uint32_t HighVecs = 0xFFFF0000;
122
123 // Memory accesses cannot be unaligned
124 const bool HasUnalignedMemAcc = false;
125
126 enum InterruptTypes
127 {
128 INT_RST,
129 INT_ABT,
130 INT_IRQ,
131 INT_FIQ,
132 NumInterruptTypes
133 };
134
125 // These otherwise unused bits of the PC are used to select a mode
126 // like the J and T bits of the CPSR.
127 static const Addr PcJBitShift = 33;
128 static const Addr PcTBitShift = 34;
129 static const Addr PcModeMask = (ULL(1) << PcJBitShift) |
130 (ULL(1) << PcTBitShift);
131};
132
133using namespace ArmISA;
134
135#endif // __ARCH_ARM_ISA_TRAITS_HH__
135 // These otherwise unused bits of the PC are used to select a mode
136 // like the J and T bits of the CPSR.
137 static const Addr PcJBitShift = 33;
138 static const Addr PcTBitShift = 34;
139 static const Addr PcModeMask = (ULL(1) << PcJBitShift) |
140 (ULL(1) << PcTBitShift);
141};
142
143using namespace ArmISA;
144
145#endif // __ARCH_ARM_ISA_TRAITS_HH__