2c2
< * Copyright (c) 2014 ARM Limited
---
> * Copyright (c) 2014,2017 ARM Limited
63c63,65
< warn("Ignoring write to miscreg %s\n", miscRegName[misc_reg]);
---
> warn("Ignoring write of 0x%lx to miscreg %s\n",
> val,
> miscRegName[misc_reg]);