vfp.isa (7848:cc5e64f8423f) | vfp.isa (8303:5a95f1d2494e) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 48 unchanged lines hidden (view full) --- 57 if (!vfpEnabled(Cpacr, Cpsr)) 58 if (op1 != (int)MISCREG_FPEXC && op1 != (int)MISCREG_FPSID && 59 op1 != (int)MISCREG_MVFR0 && op1 != (int)MISCREG_MVFR1) 60 return disabledFault(); 61 if (!inPrivilegedMode(Cpsr)) 62 if (op1 != (int)MISCREG_FPSCR) 63 return disabledFault(); 64 ''' | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 48 unchanged lines hidden (view full) --- 57 if (!vfpEnabled(Cpacr, Cpsr)) 58 if (op1 != (int)MISCREG_FPEXC && op1 != (int)MISCREG_FPSID && 59 op1 != (int)MISCREG_MVFR0 && op1 != (int)MISCREG_MVFR1) 60 return disabledFault(); 61 if (!inPrivilegedMode(Cpsr)) 62 if (op1 != (int)MISCREG_FPSCR) 63 return disabledFault(); 64 ''' |
65 vmrsApsrEnabledCheckCode = ''' 66 if (!vfpEnabled(Cpacr, Cpsr)) 67 return disabledFault(); 68 ''' |
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65}}; 66 67def template FpRegRegOpDeclare {{ 68class %(class_name)s : public %(base_class)s 69{ 70 public: 71 // Constructor 72 %(class_name)s(ExtMachInst machInst, --- 107 unchanged lines hidden --- | 69}}; 70 71def template FpRegRegOpDeclare {{ 72class %(class_name)s : public %(base_class)s 73{ 74 public: 75 // Constructor 76 %(class_name)s(ExtMachInst machInst, --- 107 unchanged lines hidden --- |