vfp.isa (7644:62873d5c2bfc) | vfp.isa (7848:cc5e64f8423f) |
---|---|
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 70 unchanged lines hidden (view full) --- 79def template FpRegRegOpConstructor {{ 80 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 81 IntRegIndex _dest, IntRegIndex _op1, 82 VfpMicroMode mode) 83 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 84 _dest, _op1, mode) 85 { 86 %(constructor)s; | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 70 unchanged lines hidden (view full) --- 79def template FpRegRegOpConstructor {{ 80 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 81 IntRegIndex _dest, IntRegIndex _op1, 82 VfpMicroMode mode) 83 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 84 _dest, _op1, mode) 85 { 86 %(constructor)s; |
87 if (!(condCode == COND_AL || condCode == COND_UC)) { 88 for (int x = 0; x < _numDestRegs; x++) { 89 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 90 } 91 } |
|
87 } 88}}; 89 90def template FpRegImmOpDeclare {{ 91class %(class_name)s : public %(base_class)s 92{ 93 public: 94 // Constructor --- 5 unchanged lines hidden (view full) --- 100 101def template FpRegImmOpConstructor {{ 102 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 103 IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode) 104 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 105 _dest, _imm, mode) 106 { 107 %(constructor)s; | 92 } 93}}; 94 95def template FpRegImmOpDeclare {{ 96class %(class_name)s : public %(base_class)s 97{ 98 public: 99 // Constructor --- 5 unchanged lines hidden (view full) --- 105 106def template FpRegImmOpConstructor {{ 107 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 108 IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode) 109 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 110 _dest, _imm, mode) 111 { 112 %(constructor)s; |
113 if (!(condCode == COND_AL || condCode == COND_UC)) { 114 for (int x = 0; x < _numDestRegs; x++) { 115 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 116 } 117 } |
|
108 } 109}}; 110 111def template FpRegRegImmOpDeclare {{ 112class %(class_name)s : public %(base_class)s 113{ 114 public: 115 // Constructor --- 9 unchanged lines hidden (view full) --- 125 IntRegIndex _dest, 126 IntRegIndex _op1, 127 uint64_t _imm, 128 VfpMicroMode mode) 129 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 130 _dest, _op1, _imm, mode) 131 { 132 %(constructor)s; | 118 } 119}}; 120 121def template FpRegRegImmOpDeclare {{ 122class %(class_name)s : public %(base_class)s 123{ 124 public: 125 // Constructor --- 9 unchanged lines hidden (view full) --- 135 IntRegIndex _dest, 136 IntRegIndex _op1, 137 uint64_t _imm, 138 VfpMicroMode mode) 139 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 140 _dest, _op1, _imm, mode) 141 { 142 %(constructor)s; |
143 if (!(condCode == COND_AL || condCode == COND_UC)) { 144 for (int x = 0; x < _numDestRegs; x++) { 145 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 146 } 147 } |
|
133 } 134}}; 135 136def template FpRegRegRegOpDeclare {{ 137class %(class_name)s : public %(base_class)s 138{ 139 public: 140 // Constructor --- 9 unchanged lines hidden (view full) --- 150 IntRegIndex _dest, 151 IntRegIndex _op1, 152 IntRegIndex _op2, 153 VfpMicroMode mode) 154 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 155 _dest, _op1, _op2, mode) 156 { 157 %(constructor)s; | 148 } 149}}; 150 151def template FpRegRegRegOpDeclare {{ 152class %(class_name)s : public %(base_class)s 153{ 154 public: 155 // Constructor --- 9 unchanged lines hidden (view full) --- 165 IntRegIndex _dest, 166 IntRegIndex _op1, 167 IntRegIndex _op2, 168 VfpMicroMode mode) 169 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 170 _dest, _op1, _op2, mode) 171 { 172 %(constructor)s; |
173 if (!(condCode == COND_AL || condCode == COND_UC)) { 174 for (int x = 0; x < _numDestRegs; x++) { 175 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 176 } 177 } |
|
158 } 159}}; | 178 } 179}}; |