vfp.isa (11513:cb3a401c45d7) vfp.isa (11671:520509f3e66c)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013, 2016 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 196 unchanged lines hidden (view full) ---

205 %(constructor)s;
206 if (!(condCode == COND_AL || condCode == COND_UC)) {
207 for (int x = 0; x < _numDestRegs; x++) {
208 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
209 }
210 }
211 }
212}};
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013, 2016 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 196 unchanged lines hidden (view full) ---

205 %(constructor)s;
206 if (!(condCode == COND_AL || condCode == COND_UC)) {
207 for (int x = 0; x < _numDestRegs; x++) {
208 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
209 }
210 }
211 }
212}};
213
214def template FpRegRegRegCondOpDeclare {{
215class %(class_name)s : public %(base_class)s
216{
217 public:
218 // Constructor
219 %(class_name)s(ExtMachInst machInst,
220 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
221 ConditionCode _cond,
222 VfpMicroMode mode = VfpNotAMicroop);
223 %(BasicExecDeclare)s
224};
225}};
226
227def template FpRegRegRegCondOpConstructor {{
228 %(class_name)s::%(class_name)s(ExtMachInst machInst,
229 IntRegIndex _dest,
230 IntRegIndex _op1,
231 IntRegIndex _op2,
232 ConditionCode _cond,
233 VfpMicroMode mode)
234 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
235 _dest, _op1, _op2, _cond, mode)
236 {
237 %(constructor)s;
238 }
239}};