vfp.isa (10474:799c8ee4ecba) vfp.isa (11513:cb3a401c45d7)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013 ARM Limited
3// Copyright (c) 2010-2013, 2016 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40let {{
41 vfpEnabledCheckCode = '''
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40let {{
41 vfpEnabledCheckCode = '''
42 uint32_t issEnCheck;
43 bool trapEnCheck;
44 uint32_t seq;
45 if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
46 trapEnCheck, xc->tcBase(), Fpexc))
47 {return disabledFault();}
48 if (trapEnCheck) {
49 CPSR cpsrEnCheck = Cpsr;
50 if (cpsrEnCheck.mode == MODE_HYP) {
51 return std::make_shared<UndefinedInstruction>(
52 machInst, issEnCheck,
53 EC_TRAPPED_HCPTR, mnemonic);
54 } else {
55 if (!inSecureState(Scr, Cpsr)) {
56 return std::make_shared<HypervisorTrap>(
57 machInst, issEnCheck,
58 EC_TRAPPED_HCPTR);
59 }
60 }
61 }
42 {
43 Fault fault = checkAdvSIMDOrFPEnabled32(xc->tcBase(),
44 Cpsr, Cpacr, Nsacr, Fpexc,
45 true, false);
46 if (fault != NoFault)
47 return fault;
48 }
62 '''
63
64 vfp64EnabledCheckCode = '''
49 '''
50
51 vfp64EnabledCheckCode = '''
65 CPSR cpsrEnCheck = Cpsr;
66 ExceptionLevel el = (ExceptionLevel) (uint8_t) cpsrEnCheck.el;
67 if (!vfpNeon64Enabled(Cpacr64, el))
68 return std::make_shared<SupervisorTrap>(machInst, 0x1E00000,
69 EC_TRAPPED_SIMD_FP);
70
71 if (ArmSystem::haveVirtualization(xc->tcBase()) && el <= EL2) {
72 HCPTR cptrEnCheck = xc->tcBase()->readMiscReg(MISCREG_CPTR_EL2);
73 if (cptrEnCheck.tfp)
74 return std::make_shared<HypervisorTrap>(machInst, 0x1E00000,
75 EC_TRAPPED_SIMD_FP);
76 }
77
78 if (ArmSystem::haveSecurity(xc->tcBase())) {
79 HCPTR cptrEnCheck = xc->tcBase()->readMiscReg(MISCREG_CPTR_EL3);
80 if (cptrEnCheck.tfp)
81 return std::make_shared<SecureMonitorTrap>(machInst, 0x1E00000,
82 EC_TRAPPED_SIMD_FP);
83 }
52 {
53 Fault fault = checkFPAdvSIMDEnabled64(xc->tcBase(), Cpsr, Cpacr64);
54 if (fault != NoFault)
55 return fault;
56 }
84 '''
85
86 vmsrEnabledCheckCode = '''
57 '''
58
59 vmsrEnabledCheckCode = '''
87 uint32_t issEnCheck;
88 bool trapEnCheck;
89 uint32_t seq;
90 if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
91 trapEnCheck, xc->tcBase()))
92 if (dest != (int)MISCREG_FPEXC && dest != (int)MISCREG_FPSID)
93 {return disabledFault();}
94 if (!inPrivilegedMode(Cpsr))
95 if (dest != (int)MISCREG_FPSCR)
96 return disabledFault();
97 if (trapEnCheck) {
98 CPSR cpsrEnCheck = Cpsr;
99 if (cpsrEnCheck.mode == MODE_HYP) {
100 return std::make_shared<UndefinedInstruction>(
101 machInst, issEnCheck,
102 EC_TRAPPED_HCPTR, mnemonic);
103 } else {
104 if (!inSecureState(Scr, Cpsr)) {
105 return std::make_shared<HypervisorTrap>(
106 machInst, issEnCheck,
107 EC_TRAPPED_HCPTR);
108 }
109 }
60 {
61 Fault fault = NoFault;
62 if (dest == (int)MISCREG_FPSCR) {
63 fault = checkAdvSIMDOrFPEnabled32(xc->tcBase(),
64 Cpsr, Cpacr, Nsacr, Fpexc,
65 true, false);
66 } else if (!inPrivilegedMode(Cpsr)) {
67 fault = disabledFault();
68 } else {
69 fault = checkAdvSIMDOrFPEnabled32(xc->tcBase(),
70 Cpsr, Cpacr, Nsacr, Fpexc,
71 false, false);
110 }
72 }
73
74 if (fault != NoFault)
75 return fault;
76 }
111 '''
112
113 vmrsEnabledCheckCode = '''
77 '''
78
79 vmrsEnabledCheckCode = '''
114 uint32_t issEnCheck;
115 bool trapEnCheck;
116 uint32_t seq;
117 if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
118 trapEnCheck, xc->tcBase()))
119 if (op1 != (int)MISCREG_FPEXC && op1 != (int)MISCREG_FPSID &&
120 op1 != (int)MISCREG_MVFR0 && op1 != (int)MISCREG_MVFR1)
121 {return disabledFault();}
122 if (!inPrivilegedMode(Cpsr))
123 if (op1 != (int)MISCREG_FPSCR)
124 return disabledFault();
125 if (trapEnCheck) {
126 CPSR cpsrEnCheck = Cpsr;
127 if (cpsrEnCheck.mode == MODE_HYP) {
128 return std::make_shared<UndefinedInstruction>(
129 machInst, issEnCheck,
130 EC_TRAPPED_HCPTR, mnemonic);
131 } else {
132 if (!inSecureState(Scr, Cpsr)) {
133 return std::make_shared<HypervisorTrap>(
134 machInst, issEnCheck,
135 EC_TRAPPED_HCPTR);
136 }
137 }
80 {
81 Fault fault = NoFault;
82 if (op1 == (int)MISCREG_FPSCR) {
83 fault = checkAdvSIMDOrFPEnabled32(xc->tcBase(),
84 Cpsr, Cpacr, Nsacr, Fpexc,
85 true, false);
86 } else if (!inPrivilegedMode(Cpsr)) {
87 fault = disabledFault();
88 } else {
89 fault = checkAdvSIMDOrFPEnabled32(xc->tcBase(),
90 Cpsr, Cpacr, Nsacr, Fpexc,
91 false, false);
138 }
92 }
93
94 if (fault != NoFault)
95 return fault;
96 }
139 '''
97 '''
140 vmrsApsrEnabledCheckCode = '''
141 uint32_t issEnCheck;
142 bool trapEnCheck;
143 uint32_t seq;
144 if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
145 trapEnCheck, xc->tcBase()))
146 {return disabledFault();}
147 if (trapEnCheck) {
148 CPSR cpsrEnCheck = Cpsr;
149 if (cpsrEnCheck.mode == MODE_HYP) {
150 return std::make_shared<UndefinedInstruction>(
151 machInst, issEnCheck,
152 EC_TRAPPED_HCPTR, mnemonic);
153 } else {
154 if (!inSecureState(Scr, Cpsr)) {
155 return std::make_shared<HypervisorTrap>(
156 machInst, issEnCheck,
157 EC_TRAPPED_HCPTR);
158 }
159 }
160 }
161 '''
162}};
163
164def template FpRegRegOpDeclare {{
165class %(class_name)s : public %(base_class)s
166{
167 public:
168 // Constructor
169 %(class_name)s(ExtMachInst machInst,

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99
100def template FpRegRegOpDeclare {{
101class %(class_name)s : public %(base_class)s
102{
103 public:
104 // Constructor
105 %(class_name)s(ExtMachInst machInst,

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