1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40def template FpRegRegOpDeclare {{
41class %(class_name)s : public %(base_class)s
42{
43 public:
44 // Constructor
45 %(class_name)s(ExtMachInst machInst,
46 IntRegIndex _dest, IntRegIndex _op1,
47 VfpMicroMode mode = VfpNotAMicroop);
48 %(BasicExecDeclare)s
49};
50}};
51
52def template FpRegRegOpConstructor {{
53 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
54 IntRegIndex _dest, IntRegIndex _op1,
55 VfpMicroMode mode)
56 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
57 _dest, _op1, mode)
58 {
59 %(constructor)s;
60 }
61}};
62
63def template FpRegImmOpDeclare {{
64class %(class_name)s : public %(base_class)s
65{
66 public:
67 // Constructor
68 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
69 uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop);
70 %(BasicExecDeclare)s
71};
72}};
73
74def template FpRegImmOpConstructor {{
75 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
76 IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode)
77 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
78 _dest, _imm, mode)
79 {
80 %(constructor)s;
81 }
82}};
83
84def template FpRegRegImmOpDeclare {{
85class %(class_name)s : public %(base_class)s
86{
87 public:
88 // Constructor
89 %(class_name)s(ExtMachInst machInst,
90 IntRegIndex _dest, IntRegIndex _op1,
91 uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop);
92 %(BasicExecDeclare)s
93};
94}};
95
96def template FpRegRegImmOpConstructor {{
97 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
98 IntRegIndex _dest,
99 IntRegIndex _op1,
100 uint64_t _imm,
101 VfpMicroMode mode)
102 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
103 _dest, _op1, _imm, mode)
104 {
105 %(constructor)s;
106 }
107}};
108
109def template FpRegRegRegOpDeclare {{
110class %(class_name)s : public %(base_class)s
111{
112 public:
113 // Constructor
114 %(class_name)s(ExtMachInst machInst,
115 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
116 VfpMicroMode mode = VfpNotAMicroop);
117 %(BasicExecDeclare)s
118};
119}};
120
121def template FpRegRegRegOpConstructor {{
122 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
123 IntRegIndex _dest,
124 IntRegIndex _op1,
125 IntRegIndex _op2,
126 VfpMicroMode mode)
127 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
128 _dest, _op1, _op2, mode)
129 {
130 %(constructor)s;
131 }
132}};