pred.isa (9077:e236675714a4) pred.isa (9250:dab0f29394f0)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 62 unchanged lines hidden (view full) ---

71 _dest, _op1, _imm, _rotC)
72 {
73 %(constructor)s;
74 if (!(condCode == COND_AL || condCode == COND_UC)) {
75 for (int x = 0; x < _numDestRegs; x++) {
76 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
77 }
78 }
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 62 unchanged lines hidden (view full) ---

71 _dest, _op1, _imm, _rotC)
72 {
73 %(constructor)s;
74 if (!(condCode == COND_AL || condCode == COND_UC)) {
75 for (int x = 0; x < _numDestRegs; x++) {
76 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
77 }
78 }
79
80 if (%(is_branch)s){
81 flags[IsControl] = true;
82 flags[IsIndirectControl] = true;
83 if (condCode == COND_AL || condCode == COND_UC)
84 flags[IsUncondControl] = true;
85 else
86 flags[IsCondControl] = true;
87 }
79 }
80}};
81
82def template DataRegDeclare {{
83class %(class_name)s : public %(base_class)s
84{
85 public:
86 // Constructor

--- 166 unchanged lines hidden --- 		88 }
89}};
90
91def template DataRegDeclare {{
92class %(class_name)s : public %(base_class)s
93{
94 public:
95 // Constructor

--- 166 unchanged lines hidden ---