pred.isa (8556:2afd82e84d95) | pred.isa (8910:2c3ee562ccca) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 98 unchanged lines hidden (view full) --- 107 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 108 } 109 } 110 111 if (%(is_branch)s){ 112 flags[IsControl] = true; 113 flags[IsIndirectControl] = true; 114 if (condCode == COND_AL || condCode == COND_UC) | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 98 unchanged lines hidden (view full) --- 107 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 108 } 109 } 110 111 if (%(is_branch)s){ 112 flags[IsControl] = true; 113 flags[IsIndirectControl] = true; 114 if (condCode == COND_AL || condCode == COND_UC) |
115 flags[IsCondControl] = true; 116 else | |
117 flags[IsUncondControl] = true; | 115 flags[IsUncondControl] = true; |
116 else 117 flags[IsCondControl] = true; |
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118 } 119 120 if (%(is_ras_pop)s) { 121 flags[IsReturn] = true; 122 } 123 } 124}}; 125 --- 126 unchanged lines hidden --- | 118 } 119 120 if (%(is_ras_pop)s) { 121 flags[IsReturn] = true; 122 } 123 } 124}}; 125 --- 126 unchanged lines hidden --- |