pred.isa (8203:78b9f056d58a) | pred.isa (8205:7ecbffb674aa) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 160 unchanged lines hidden (view full) --- 169 if (fault == NoFault) 170 { 171 %(op_wb)s; 172 } 173 } else { 174 xc->setPredicate(false); 175 } 176 | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 160 unchanged lines hidden (view full) --- 169 if (fault == NoFault) 170 { 171 %(op_wb)s; 172 } 173 } else { 174 xc->setPredicate(false); 175 } 176 |
177 if (fault == NoFault && machInst.itstateMask != 0&& 178 (!isMicroop() || isLastMicroop())) { 179 xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); 180 } 181 | |
182 return fault; 183 } 184}}; 185 186def template QuiescePredOpExecute {{ 187 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 188 { 189 Fault fault = NoFault; --- 11 unchanged lines hidden (view full) --- 201 } 202 } else { 203 xc->setPredicate(false); 204#if FULL_SYSTEM 205 PseudoInst::quiesceSkip(xc->tcBase()); 206#endif 207 } 208 | 177 return fault; 178 } 179}}; 180 181def template QuiescePredOpExecute {{ 182 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 183 { 184 Fault fault = NoFault; --- 11 unchanged lines hidden (view full) --- 196 } 197 } else { 198 xc->setPredicate(false); 199#if FULL_SYSTEM 200 PseudoInst::quiesceSkip(xc->tcBase()); 201#endif 202 } 203 |
209 if (fault == NoFault && machInst.itstateMask != 0&& 210 (!isMicroop() || isLastMicroop())) { 211 xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); 212 } 213 | |
214 return fault; 215 } 216}}; 217 218def template DataDecode {{ 219 if (machInst.opcode4 == 0) { 220 if (machInst.sField == 0) 221 return new %(class_name)sImm(machInst); --- 16 unchanged lines hidden --- | 204 return fault; 205 } 206}}; 207 208def template DataDecode {{ 209 if (machInst.opcode4 == 0) { 210 if (machInst.sField == 0) 211 return new %(class_name)sImm(machInst); --- 16 unchanged lines hidden --- |