pred.isa (7848:cc5e64f8423f) | pred.isa (8142:e08035e1a1f6) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 156 unchanged lines hidden (view full) --- 165 (!isMicroop() || isLastMicroop())) { 166 xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); 167 } 168 169 return fault; 170 } 171}}; 172 | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 156 unchanged lines hidden (view full) --- 165 (!isMicroop() || isLastMicroop())) { 166 xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); 167 } 168 169 return fault; 170 } 171}}; 172 |
173def template QuiescePredOpExecute {{ 174 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 175 { 176 Fault fault = NoFault; 177 uint64_t resTemp = 0; 178 resTemp = resTemp; 179 %(op_decl)s; 180 %(op_rd)s; 181 182 if (%(predicate_test)s) 183 { 184 %(code)s; 185 if (fault == NoFault) 186 { 187 %(op_wb)s; 188 } 189 } else { 190 xc->setPredicate(false); 191#if FULL_SYSTEM 192 PseudoInst::quiesceSkip(xc->tcBase()); 193#endif 194 } 195 196 if (fault == NoFault && machInst.itstateMask != 0&& 197 (!isMicroop() || isLastMicroop())) { 198 xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); 199 } 200 201 return fault; 202 } 203}}; 204 |
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173def template DataDecode {{ 174 if (machInst.opcode4 == 0) { 175 if (machInst.sField == 0) 176 return new %(class_name)sImm(machInst); 177 else 178 return new %(class_name)sImmCc(machInst); 179 } else { 180 if (machInst.sField == 0) --- 12 unchanged lines hidden --- | 205def template DataDecode {{ 206 if (machInst.opcode4 == 0) { 207 if (machInst.sField == 0) 208 return new %(class_name)sImm(machInst); 209 else 210 return new %(class_name)sImmCc(machInst); 211 } else { 212 if (machInst.sField == 0) --- 12 unchanged lines hidden --- |