neon64.isa (12616:4b463b4dc098) neon64.isa (13544:0b4e5446167c)
1// -*- mode: c++ -*-
2
3// Copyright (c) 2012-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 166 unchanged lines hidden (view full) ---

175 Fault %(class_name)s<Element>::execute(ExecContext *xc,
176 Trace::InstRecord *traceData) const
177 {
178 Fault fault = NoFault;
179 %(op_decl)s;
180 %(op_rd)s;
181
182 const unsigned rCount = %(r_count)d;
1// -*- mode: c++ -*-
2
3// Copyright (c) 2012-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 166 unchanged lines hidden (view full) ---

175 Fault %(class_name)s<Element>::execute(ExecContext *xc,
176 Trace::InstRecord *traceData) const
177 {
178 Fault fault = NoFault;
179 %(op_decl)s;
180 %(op_rd)s;
181
182 const unsigned rCount = %(r_count)d;
183 const unsigned eCount = rCount * sizeof(FloatRegBits) / sizeof(Element);
184 const unsigned eCountFull = 4 * sizeof(FloatRegBits) / sizeof(Element);
183 const unsigned eCount = rCount * sizeof(uint32_t) / sizeof(Element);
184 const unsigned eCountFull = 4 * sizeof(uint32_t) / sizeof(Element);
185
186 union RegVect {
185
186 union RegVect {
187 FloatRegBits regs[rCount];
187 uint32_t regs[rCount];
188 Element elements[eCount];
189 };
190
191 union FullRegVect {
188 Element elements[eCount];
189 };
190
191 union FullRegVect {
192 FloatRegBits regs[4];
192 uint32_t regs[4];
193 Element elements[eCountFull];
194 };
195
196 %(code)s;
197 if (fault == NoFault)
198 {
199 %(op_wb)s;
200 }

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209 Trace::InstRecord *traceData) const
210 {
211 typedef typename bigger_type_t<Element>::type BigElement;
212 Fault fault = NoFault;
213 %(op_decl)s;
214 %(op_rd)s;
215
216 const unsigned rCount = %(r_count)d;
193 Element elements[eCountFull];
194 };
195
196 %(code)s;
197 if (fault == NoFault)
198 {
199 %(op_wb)s;
200 }

--- 8 unchanged lines hidden (view full) ---

209 Trace::InstRecord *traceData) const
210 {
211 typedef typename bigger_type_t<Element>::type BigElement;
212 Fault fault = NoFault;
213 %(op_decl)s;
214 %(op_rd)s;
215
216 const unsigned rCount = %(r_count)d;
217 const unsigned eCount = rCount * sizeof(FloatRegBits) / sizeof(Element);
218 const unsigned eCountFull = 4 * sizeof(FloatRegBits) / sizeof(Element);
217 const unsigned eCount = rCount * sizeof(uint32_t) / sizeof(Element);
218 const unsigned eCountFull = 4 * sizeof(uint32_t) / sizeof(Element);
219
220 union RegVect {
219
220 union RegVect {
221 FloatRegBits regs[rCount];
221 uint32_t regs[rCount];
222 Element elements[eCount];
223 BigElement bigElements[eCount / 2];
224 };
225
226 union BigRegVect {
222 Element elements[eCount];
223 BigElement bigElements[eCount / 2];
224 };
225
226 union BigRegVect {
227 FloatRegBits regs[2 * rCount];
227 uint32_t regs[2 * rCount];
228 BigElement elements[eCount];
229 };
230
231 union FullRegVect {
228 BigElement elements[eCount];
229 };
230
231 union FullRegVect {
232 FloatRegBits regs[4];
232 uint32_t regs[4];
233 Element elements[eCountFull];
234 };
235
236 %(code)s;
237 if (fault == NoFault)
238 {
239 %(op_wb)s;
240 }

--- 282 unchanged lines hidden --- 		233 Element elements[eCountFull];
234 };
235
236 %(code)s;
237 if (fault == NoFault)
238 {
239 %(op_wb)s;
240 }

--- 282 unchanged lines hidden ---