mult.isa (7848:cc5e64f8423f) mult.isa (10184:bbfa3152bdea)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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44 // Constructor
45 %(class_name)s(ExtMachInst machInst, IntRegIndex _reg0,
46 IntRegIndex _reg1, IntRegIndex _reg2);
47 %(BasicExecDeclare)s
48};
49}};
50
51def template Mult3Constructor {{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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44 // Constructor
45 %(class_name)s(ExtMachInst machInst, IntRegIndex _reg0,
46 IntRegIndex _reg1, IntRegIndex _reg2);
47 %(BasicExecDeclare)s
48};
49}};
50
51def template Mult3Constructor {{
52 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
52 %(class_name)s::%(class_name)s(ExtMachInst machInst,
53 IntRegIndex _reg0,
54 IntRegIndex _reg1,
55 IntRegIndex _reg2)
56 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
57 _reg0, _reg1, _reg2)
58 {
59 %(constructor)s;
60 if (!(condCode == COND_AL || condCode == COND_UC)) {

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73 %(class_name)s(ExtMachInst machInst,
74 IntRegIndex _reg0, IntRegIndex _reg1,
75 IntRegIndex _reg2, IntRegIndex _reg3);
76 %(BasicExecDeclare)s
77};
78}};
79
80def template Mult4Constructor {{
53 IntRegIndex _reg0,
54 IntRegIndex _reg1,
55 IntRegIndex _reg2)
56 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
57 _reg0, _reg1, _reg2)
58 {
59 %(constructor)s;
60 if (!(condCode == COND_AL || condCode == COND_UC)) {

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73 %(class_name)s(ExtMachInst machInst,
74 IntRegIndex _reg0, IntRegIndex _reg1,
75 IntRegIndex _reg2, IntRegIndex _reg3);
76 %(BasicExecDeclare)s
77};
78}};
79
80def template Mult4Constructor {{
81 inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
81 %(class_name)s::%(class_name)s(ExtMachInst machInst,
82 IntRegIndex _reg0,
83 IntRegIndex _reg1,
84 IntRegIndex _reg2,
85 IntRegIndex _reg3)
86 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
87 _reg0, _reg1, _reg2, _reg3)
88 {
89 %(constructor)s;
90 if (!(condCode == COND_AL || condCode == COND_UC)) {
91 for (int x = 0; x < _numDestRegs; x++) {
92 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
93 }
94 }
95 }
96}};
82 IntRegIndex _reg0,
83 IntRegIndex _reg1,
84 IntRegIndex _reg2,
85 IntRegIndex _reg3)
86 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
87 _reg0, _reg1, _reg2, _reg3)
88 {
89 %(constructor)s;
90 if (!(condCode == COND_AL || condCode == COND_UC)) {
91 for (int x = 0; x < _numDestRegs; x++) {
92 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
93 }
94 }
95 }
96}};