mult.isa (7159:2d7f1528f2d0) | mult.isa (7848:cc5e64f8423f) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 43 unchanged lines hidden (view full) --- 52 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 53 IntRegIndex _reg0, 54 IntRegIndex _reg1, 55 IntRegIndex _reg2) 56 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 57 _reg0, _reg1, _reg2) 58 { 59 %(constructor)s; | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 43 unchanged lines hidden (view full) --- 52 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 53 IntRegIndex _reg0, 54 IntRegIndex _reg1, 55 IntRegIndex _reg2) 56 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 57 _reg0, _reg1, _reg2) 58 { 59 %(constructor)s; |
60 if (!(condCode == COND_AL || condCode == COND_UC)) { 61 for (int x = 0; x < _numDestRegs; x++) { 62 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 63 } 64 } |
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60 } 61}}; 62 63def template Mult4Declare {{ 64class %(class_name)s : public %(base_class)s 65{ 66 public: 67 // Constructor --- 9 unchanged lines hidden (view full) --- 77 IntRegIndex _reg0, 78 IntRegIndex _reg1, 79 IntRegIndex _reg2, 80 IntRegIndex _reg3) 81 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 82 _reg0, _reg1, _reg2, _reg3) 83 { 84 %(constructor)s; | 65 } 66}}; 67 68def template Mult4Declare {{ 69class %(class_name)s : public %(base_class)s 70{ 71 public: 72 // Constructor --- 9 unchanged lines hidden (view full) --- 82 IntRegIndex _reg0, 83 IntRegIndex _reg1, 84 IntRegIndex _reg2, 85 IntRegIndex _reg3) 86 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 87 _reg0, _reg1, _reg2, _reg3) 88 { 89 %(constructor)s; |
90 if (!(condCode == COND_AL || condCode == COND_UC)) { 91 for (int x = 0; x < _numDestRegs; x++) { 92 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 93 } 94 } |
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85 } 86}}; | 95 } 96}}; |