misc64.isa (10037:5cac77888310) | misc64.isa (10184:bbfa3152bdea) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2011 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 37 unchanged lines hidden (view full) --- 46 %(class_name)s(ExtMachInst machInst, 47 IntRegIndex _dest, IntRegIndex _op1, 48 uint64_t _imm1, uint64_t _imm2); 49 %(BasicExecDeclare)s 50}; 51}}; 52 53def template RegRegImmImmOp64Constructor {{ | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2011 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 37 unchanged lines hidden (view full) --- 46 %(class_name)s(ExtMachInst machInst, 47 IntRegIndex _dest, IntRegIndex _op1, 48 uint64_t _imm1, uint64_t _imm2); 49 %(BasicExecDeclare)s 50}; 51}}; 52 53def template RegRegImmImmOp64Constructor {{ |
54 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, | 54 %(class_name)s::%(class_name)s(ExtMachInst machInst, |
55 IntRegIndex _dest, 56 IntRegIndex _op1, 57 uint64_t _imm1, 58 uint64_t _imm2) 59 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 60 _dest, _op1, _imm1, _imm2) 61 { 62 %(constructor)s; --- 9 unchanged lines hidden (view full) --- 72 %(class_name)s(ExtMachInst machInst, 73 IntRegIndex _dest, IntRegIndex _op1, 74 IntRegIndex _op2, uint64_t _imm); 75 %(BasicExecDeclare)s 76}; 77}}; 78 79def template RegRegRegImmOp64Constructor {{ | 55 IntRegIndex _dest, 56 IntRegIndex _op1, 57 uint64_t _imm1, 58 uint64_t _imm2) 59 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 60 _dest, _op1, _imm1, _imm2) 61 { 62 %(constructor)s; --- 9 unchanged lines hidden (view full) --- 72 %(class_name)s(ExtMachInst machInst, 73 IntRegIndex _dest, IntRegIndex _op1, 74 IntRegIndex _op2, uint64_t _imm); 75 %(BasicExecDeclare)s 76}; 77}}; 78 79def template RegRegRegImmOp64Constructor {{ |
80 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, | 80 %(class_name)s::%(class_name)s(ExtMachInst machInst, |
81 IntRegIndex _dest, 82 IntRegIndex _op1, 83 IntRegIndex _op2, 84 uint64_t _imm) 85 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 86 _dest, _op1, _op2, _imm) 87 { 88 %(constructor)s; 89 } 90}}; 91 | 81 IntRegIndex _dest, 82 IntRegIndex _op1, 83 IntRegIndex _op2, 84 uint64_t _imm) 85 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 86 _dest, _op1, _op2, _imm) 87 { 88 %(constructor)s; 89 } 90}}; 91 |